Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
WY

Wayne Yamamoto — 9 Patents

Oracle: 5 patents #2,558 of 14,854Top 20%
NSNational Semiconductor: 1 patents #1,247 of 2,238Top 60%
NVIDIA: 1 patents #4,387 of 7,811Top 60%
Samsung: 1 patents #50,112 of 75,807Top 70%
MTMips Technologies: 1 patents #87 of 35Top 250%
Saratoga, CA: #909 of 2,933 inventorsTop 35%
California: #67,547 of 386,348 inventorsTop 20%
Overall (All Time): #535,341 of 4,157,543Top 15%
9 Patents All Time
Wayne Yamamoto has been granted 9 US patents while listed as an inventor at Oracle. The first was granted in 1997 and the most recent in February 2024. Wayne Yamamoto ranks #535,341 of 4,157,543 US inventors in our database (top 12.9%). Patent records list Wayne Yamamoto in Saratoga, CA, US.

Patents per Year

Patents granted per year, 1997 to 2024Bar chart with a peak of 4 patents in 2005.peak 41997: 1 patents19972004: 1 patents20042005: 4 patents20052016: 1 patents20162019: 1 patents20192024: 1 patents2024

Issued Patents All Time

Showing 1–9 of 9 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11899588 Systems, methods, and devices for discarding inactive intermediate render targets Anshujit Sharma, Sushant Kondguli, Zhenhong Liu, Wilson Wai Lun Fung, Arun Radhakrishnan 2024-02-13
10459725 Execution of load instructions in a processor Harit Modi 2019-10-29
9529712 Techniques for balancing accesses to memory having different memory types Brian Kelleher, Emmett M. Kilgariff 2016-12-27 $156,812,000
6976125 Method and apparatus for predicting hot spots in cache memories Sudarshan Kadambi, Vijay Balakrishnan 2005-12-13 $5,227,000
6954846 MICROPROCESSOR AND METHOD FOR GIVING EACH THREAD EXCLUSIVE ACCESS TO ONE REGISTER FILE IN A MULTI-THREADING MODE AND FOR GIVING AN ACTIVE THREAD ACCESS TO MULTIPLE REGISTER FILES IN A SINGLE THREAD MODE Daniel Leibholz 2005-10-11 $11,288,000
6948032 Method and apparatus for reducing the effects of hot spots in cache memories Sudarshan Kadambi, Vijay Balakrishnan 2005-09-20 $8,930,000
6934830 Method and apparatus for reducing register file access times in pipelined processors Sudarshan Kadambi, Adam R. Talcott 2005-08-23 $4,432,000
6725338 Method and apparatus for preventing cache pollution in microprocessors with speculative address loads Christopher Gomez 2004-04-20 $14,768,000
5692146 Method of implementing fast 486TM microprocessor compatible string operations Narendra Sankar, Mario Nemirovsky 1997-11-25 $13,646,000