Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
MN

Mario Nemirovsky — 69 Patents

MTMips Technologies: 34 patents #3 of 129Top 3%
NSNational Semiconductor: 10 patents #172 of 2,238Top 8%
DEDelco Electronics: 4 patents #87 of 908Top 10%
Apple: 3 patents #7,530 of 18,612Top 45%
Motorola: 2 patents #7,269 of 14,142Top 55%
San Francisco, CA: #267 of 26,999 inventorsTop 1%
California: #4,590 of 386,348 inventorsTop 2%
Overall (All Time): #29,979 of 4,157,543Top 1%
69 Patents All Time
Mario Nemirovsky has been granted 69 US patents while listed as an inventor at Mips Technologies. The first was granted in 1990 and the most recent in April 2025. Mario Nemirovsky ranks #29,979 of 4,157,543 US inventors in our database (top 0.72%). Patent records list Mario Nemirovsky in San Francisco, CA, US.

Issued Patents All Time

Showing 1–25 of 69 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12289223 Automatic communication network control Ivan Romero Ruiz, Francesco Ciaccia, René Serral-Gracià 2025-04-29
10868752 Intelligent adaptive transport layer to enhance performance using multiple channels René Serral-Gracià, Francesco Ciaccia, Ivan Romero Ruiz 2020-12-15
10404572 Communication between nodes in spontaneous area networks David Fuste Vilella, Jorge Garcia Vidal, Daniel Nemirovsky 2019-09-03
9794162 Systems and methods for creating, managing and communicating users and applications on spontaneous area networks David Fuste Vilella, Jorge Garcia Vidal, Daniel Nemirovsky 2017-10-17
9191303 Systems and methods for creating, managing and communicating users and applications on spontaneous area networks David Fuste Vilella, Jorge Garcia Vidal, Daniel Nemirovsky 2015-11-17
8493849 Systems and methods for creating, managing and communicating users and applications on spontaneous area networks David Fuste Vilella, Jorge Garcia Vidal, Daniel Nemirovsky 2013-07-23
8468540 Interrupt and exception handling for multi-streaming digital processors Adolfo Nemirovsky, Narendra Sankar 2013-06-18
8081645 Context sharing between a streaming processing unit (SPU) and a packet management unit (PMU) in a packet processing environment Enrique Musoll 2011-12-20 $3,247,000
7926062 Interrupt and exception handling for multi-streaming digital processors Adolfo Nemirovsky, Narendra Sankar 2011-04-12 $2,509,000
7900207 Interrupt and exception handling for multi-streaming digital processors Adolfo Nemirovsky, Narendra Sankar 2011-03-01 $4,285,000
7877481 Method and apparatus for overflowing data packets to a software-controlled memory when they do not fit into a hardware-controlled memory Enrique Musoll, Stephen Melvin 2011-01-25 $9,283,000
7765554 Context selection and activation mechanism for activating one of a group of inactive contexts in a processor core for servicing interrupts Enrique Musoll, Stephen Melvin 2010-07-27 $1,129,000
7765546 Interstream control and communications for multi-streaming digital processors Adolfo Nemirovsky, Narendra Sankar 2010-07-27 $1,129,000
7715410 Queueing system for processors in packet routing operations Enric Musoll, Stephen Melvin, Narendra Sankar, Nandakumar Sampath, Adolfo Nemirovsky 2010-05-11 $2,147,000
7707391 Methods and apparatus for improving fetching and dispatch of instructions in multithreaded processors Enrique Musoll 2010-04-27 $1,243,000
7661112 Methods and apparatus for managing a buffer of events in the background Narendra Sankar, Adolfo Nemirovsky, Enric Musoll 2010-02-09 $960,000
7650605 Method and apparatus for implementing atomicity of memory operations in dynamic multi-streaming processors Stephen Melvin 2010-01-19 $1,098,000
7649901 Method and apparatus for optimizing selection of available contexts for packet processing in multi-stream packet processing Enrique Musoll 2010-01-19 $1,098,000
7636836 Fetch and dispatch disassociation apparatus for multistreaming processors Adolfo Nemirovsky, Narendra Sankar, Enrique Musoll 2009-12-22 $3,259,000
7634622 Packet processor that generates packet-start offsets to immediately store incoming streamed packets using parallel, staggered round-robin arbitration to interleaved banks of memory Enrique Musoll, Jeffrey T. Huynh 2009-12-15
7571270 Monitoring of shared-resource locks in a multi-processor system with locked-resource bits packed into registers to detect starved threads Enrique Musoll, Jeffrey T. Huynh 2009-08-04
7551626 Queueing system for processors in packet routing operations Enric Musoll, Stephen Melvin, Narendra Sankar, Nandakumar Sampath, Adolfo Nemirovsky 2009-06-23 $1,260,000
7529907 Method and apparatus for improved computer load and store operations Stephen Melvin, Enrique Musoll, Narendra Sankar 2009-05-05 $1,452,000
7502876 Background memory manager that determines if data structures fits in memory with memory state transactions map Narendra Sankar, Adolfo Nemirovsky, Enric Musoll 2009-03-10 $1,796,000
7467385 Interrupt and exception handling for multi-streaming digital processors Adolfo Nemirovsky, Narendra Sankar 2008-12-16 $600,000