Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
MN

Mario Nemirovsky — 69 Patents

MTMips Technologies: 34 patents #3 of 129Top 3%
NSNational Semiconductor: 10 patents #172 of 2,238Top 8%
DEDelco Electronics: 4 patents #87 of 908Top 10%
Apple: 3 patents #7,530 of 18,612Top 45%
Motorola: 2 patents #7,269 of 14,142Top 55%
San Francisco, CA: #267 of 26,999 inventorsTop 1%
California: #4,590 of 386,348 inventorsTop 2%
Overall (All Time): #29,979 of 4,157,543Top 1%
69 Patents All Time
Mario Nemirovsky has been granted 69 US patents while listed as an inventor at Mips Technologies. The first was granted in 1990 and the most recent in April 2025. Mario Nemirovsky ranks #29,979 of 4,157,543 US inventors in our database (top 0.72%). Patent records list Mario Nemirovsky in San Francisco, CA, US.

Patents per Year

Patents granted per year, 1990 to 2025Bar chart with a peak of 13 patents in 2006.peak 131990: 1 patents19901991: 2 patents1992: 3 patents1995: 1 patents19951996: 1 patents1997: 5 patents1998: 4 patents19981999: 1 patents2000: 1 patents2001: 2 patents20012002: 2 patents2004: 1 patents2006: 13 patents20062007: 5 patents2008: 3 patents2009: 6 patents20092010: 7 patents2011: 4 patents2013: 2 patents20132015: 1 patents2017: 1 patents2019: 1 patents20192020: 1 patents2025: 1 patents2025

Issued Patents All Time

Showing 26–50 of 69 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
7406586 Fetch and dispatch disassociation apparatus for multi-streaming processors Adolfo Nemirovsky, Narendra Sankar, Enrique Musoll 2008-07-29 $1,661,000
7360217 Multi-threaded packet processing engine for stateful packet processing Stephen Melvin, Enrique Musoll, Jeffery Huynh 2008-04-15
7280548 Method and apparatus for non-speculative pre-fetch operation in data packet processing Nandakumar Sampath, Enrique Musoll, Stephen Melvin 2007-10-09 $1,318,000
7257814 Method and apparatus for implementing atomicity of memory operations in dynamic multi-streaming processors Stephen Melvin 2007-08-14 $2,718,000
7237093 Instruction fetching system in a multithreaded processor utilizing cache miss predictions to fetch instructions from multiple hardware streams Enric Musoll 2007-06-26 $995,000
7197043 Method for allocating memory space for limited packet head and/or tail growth Enrique Musoll, Stephen Melvin 2007-03-27 $1,738,000
7165257 Context selection and activation mechanism for activating one of a group of inactive contexts in a processor core for servicing interrupts Enrique Musoll, Stephen Melvin 2007-01-16 $3,504,000
7155516 Method and apparatus for overflowing data packets to a software-controlled memory when they do not fit into a hardware-controlled memory Enrique Musoll, Stephen Melvin 2006-12-26 $3,338,000
7139901 Extended instruction set for packet processing applications Enrique Musoll, Stephen Melvin 2006-11-21 $1,922,000
7139898 Fetch and dispatch disassociation apparatus for multistreaming processors Adolfo Nemirovsky, Narendra Sankar, Enrique Musoll 2006-11-21 $1,922,000
7076630 Method and apparatus for allocating and de-allocating consecutive blocks of memory in background memo management Enrique Musoll 2006-07-11
7065096 Method for allocating memory space for limited packet head and/or tail growth Enrique Musoll, Stephen Melvin 2006-06-20 $1,583,000
7058064 Queueing system for processors in packet routing operations Enric Musoll, Stephen Melvin, Narendra Sankar, Nandakumar Sampath, Adolfo Nemirovsky 2006-06-06 $3,092,000
7058065 Method and apparatus for preventing undesirable packet download with pending read/write operations in data packet processing Enrique Musoll, Thomas Yeh 2006-06-06
7042887 Method and apparatus for non-speculative pre-fetch operation in data packet processing Nandakumar Sampath, Enrique Musoll, Stephen Melvin 2006-05-09 $1,334,000
7043467 Wire-speed multi-dimensional packet classifier Rodolfo A. Milito, Adolfo Nemirovsky 2006-05-09 $1,334,000
7035998 Clustering stream and/or instruction queues for multi-streaming processors Stephen Melvin, Nandakumar Sampath, Enrique Musoll, Hector Urdaneta 2006-04-25 $2,139,000
7035997 Methods and apparatus for improving fetching and dispatch of instructions in multithreaded processors Enric Musoll 2006-04-25 $2,139,000
7032226 Methods and apparatus for managing a buffer of events in the background Narendra Sankar, Adolfo Nemirovsky, Enric Musoll 2006-04-18 $4,702,000
7020879 Interrupt and exception handling for multi-streaming digital processors Adolfo Nemirovsky, Narendra Sankar 2006-03-28 $4,682,000
6789100 Interstream control and communications for multi-streaming digital processors Adolfo Nemirovsky, Narendra Sankar 2004-09-07 $2,591,000
6477562 Prioritized instruction scheduling for multi-streaming processors Adolfo Nemirovsky, Narendra Sankar 2002-11-05
6389449 Interstream control and communications for multi-streaming digital processors Adolfo Nemirovsky, Narendra Sankar 2002-05-14
6292888 Register transfer unit for electronic processor Adolfo Nemirovsky, Narendra Sankar 2001-09-18
6237074 Tagged prefetch and instruction decoder for variable length instruction set and method of operation Christopher E. Phillips, Robert J. Divivier 2001-05-22 $19,156,000