Issued Patents All Time
Showing 26–50 of 69 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7406586 | Fetch and dispatch disassociation apparatus for multi-streaming processors | Adolfo Nemirovsky, Narendra Sankar, Enrique Musoll | 2008-07-29 |
| 7360217 | Multi-threaded packet processing engine for stateful packet processing | Stephen Melvin, Enrique Musoll, Jeffery Huynh | 2008-04-15 |
| 7280548 | Method and apparatus for non-speculative pre-fetch operation in data packet processing | Nandakumar Sampath, Enrique Musoll, Stephen Melvin | 2007-10-09 |
| 7257814 | Method and apparatus for implementing atomicity of memory operations in dynamic multi-streaming processors | Stephen Melvin | 2007-08-14 |
| 7237093 | Instruction fetching system in a multithreaded processor utilizing cache miss predictions to fetch instructions from multiple hardware streams | Enric Musoll | 2007-06-26 |
| 7197043 | Method for allocating memory space for limited packet head and/or tail growth | Enrique Musoll, Stephen Melvin | 2007-03-27 |
| 7165257 | Context selection and activation mechanism for activating one of a group of inactive contexts in a processor core for servicing interrupts | Enrique Musoll, Stephen Melvin | 2007-01-16 |
| 7155516 | Method and apparatus for overflowing data packets to a software-controlled memory when they do not fit into a hardware-controlled memory | Enrique Musoll, Stephen Melvin | 2006-12-26 |
| 7139901 | Extended instruction set for packet processing applications | Enrique Musoll, Stephen Melvin | 2006-11-21 |
| 7139898 | Fetch and dispatch disassociation apparatus for multistreaming processors | Adolfo Nemirovsky, Narendra Sankar, Enrique Musoll | 2006-11-21 |
| 7076630 | Method and apparatus for allocating and de-allocating consecutive blocks of memory in background memo management | Enrique Musoll | 2006-07-11 |
| 7065096 | Method for allocating memory space for limited packet head and/or tail growth | Enrique Musoll, Stephen Melvin | 2006-06-20 |
| 7058064 | Queueing system for processors in packet routing operations | Enric Musoll, Stephen Melvin, Narendra Sankar, Nandakumar Sampath, Adolfo Nemirovsky | 2006-06-06 |
| 7058065 | Method and apparatus for preventing undesirable packet download with pending read/write operations in data packet processing | Enrique Musoll, Thomas Yeh | 2006-06-06 |
| 7043467 | Wire-speed multi-dimensional packet classifier | Rodolfo A. Milito, Adolfo Nemirovsky | 2006-05-09 |
| 7042887 | Method and apparatus for non-speculative pre-fetch operation in data packet processing | Nandakumar Sampath, Enrique Musoll, Stephen Melvin | 2006-05-09 |
| 7035998 | Clustering stream and/or instruction queues for multi-streaming processors | Stephen Melvin, Nandakumar Sampath, Enrique Musoll, Hector Urdaneta | 2006-04-25 |
| 7035997 | Methods and apparatus for improving fetching and dispatch of instructions in multithreaded processors | Enric Musoll | 2006-04-25 |
| 7032226 | Methods and apparatus for managing a buffer of events in the background | Narendra Sankar, Adolfo Nemirovsky, Enric Musoll | 2006-04-18 |
| 7020879 | Interrupt and exception handling for multi-streaming digital processors | Adolfo Nemirovsky, Narendra Sankar | 2006-03-28 |
| 6789100 | Interstream control and communications for multi-streaming digital processors | Adolfo Nemirovsky, Narendra Sankar | 2004-09-07 |
| 6477562 | Prioritized instruction scheduling for multi-streaming processors | Adolfo Nemirovsky, Narendra Sankar | 2002-11-05 |
| 6389449 | Interstream control and communications for multi-streaming digital processors | Adolfo Nemirovsky, Narendra Sankar | 2002-05-14 |
| 6292888 | Register transfer unit for electronic processor | Adolfo Nemirovsky, Narendra Sankar | 2001-09-18 |
| 6237074 | Tagged prefetch and instruction decoder for variable length instruction set and method of operation | Christopher E. Phillips, Robert J. Divivier | 2001-05-22 |