Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
RD

Robert J. Divivier — 21 Patents

ITIntegrated Device Technology: 9 patents #51 of 758Top 7%
NSNational Semiconductor: 7 patents #267 of 2,238Top 15%
Cisco: 2 patents #5,546 of 13,007Top 45%
M(Microsemi Storage Solutions (U.S.): 1 patents #24 of 64Top 40%
San Jose, CA: #3,111 of 32,062 inventorsTop 10%
California: #27,449 of 386,348 inventorsTop 8%
Overall (All Time): #201,324 of 4,157,543Top 5%
21 Patents All Time
Robert J. Divivier has been granted 21 US patents while listed as an inventor at Integrated Device Technology. The first was granted in 1997 and the most recent in October 2016. Robert J. Divivier ranks #201,324 of 4,157,543 US inventors in our database (top 4.8%). Patent records list Robert J. Divivier in San Jose, CA, US.

Patents per Year

Patents granted per year, 1997 to 2016Bar chart with a peak of 4 patents in 1998.peak 41997: 2 patents19971998: 4 patents2001: 2 patents20012003: 2 patents2004: 1 patents20042005: 1 patents2006: 4 patents20062007: 1 patents2008: 2 patents20082010: 1 patents2016: 1 patents2016

Issued Patents All Time

Showing 1–21 of 21 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9467307 Method of tracking arrival order of packets into plural queues 2016-10-11
7647438 Binary base address sorting method and device with shift vector Christopher I. W. Norrie, Christopher Bergen, Thomas Norrie 2010-01-12 $4,813,000
7454554 Binary base address search device and method Christopher I. W. Norrie, Christopher Bergen, Thomas Norrie 2008-11-18 $7,123,000
7356722 Variably delayable transmission of packets between independently clocked source, intermediate, and destination circuits while maintaining orderly and timely processing in one or both of the intermediate and destination circuits Onchuen (Daryn) Lau, Matthew D. Ornes, Chris D. Bergen, Gene Chui, Christopher I. W. Norrie +1 more 2008-04-08 $6,160,000
7181485 Variably delayable transmission of packets between independently clocked source, intermediate, and destination circuits while maintaining orderly and timely processing in one or both of the intermediate and destination circuits Onchuen (Daryn) Lau, Matthew D. Ornes, Chris D. Bergen, Gene Chui, Christopher I. W. Norrie +1 more 2007-02-20 $26,262,000
7110405 Multicast cell buffer for network switch 2006-09-19 $4,837,000
7079485 Multiservice switching system with distributed switch fabric Onchuen (Daryn) Lau, Chris D. Bergen, Gene Chui, Christopher I. W. Norrie, Matthew D. Ornes +1 more 2006-07-18 $6,502,000
7058057 Network switch port traffic manager having configurable packet and cell servicing David Dooley 2006-06-06 $7,419,000
7058070 Back pressure control system for network switch port Toan D. Tran 2006-06-06 $7,419,000
6959002 Traffic manager for network switch port John Wynne, David Dooley 2005-10-25 $7,544,000
6687781 Fair weighted queuing bandwidth allocation system for network switch port John Wynne 2004-02-03
6618382 Auto early packet discard (EPD) mechanism for automatically enabling EPD on an asynchronous transfer mode (ATM) network Christopher Dean Bergen 2003-09-09 $174,371,000
6598132 Buffer manager for network switch port Toan D. Tran, Siyad Chih-Hua Ma 2003-07-22
6237074 Tagged prefetch and instruction decoder for variable length instruction set and method of operation Christopher E. Phillips, Mario Nemirovsky 2001-05-22 $19,156,000
6212181 Method for using the departure queue memory bandwidth to support additional cell arrivals in an ATM switch Christopher Bergen, Gary S. Goldman 2001-04-03 $278,530,000
5774684 Integrated circuit with multiple functions sharing multiple internal signal buses according to distributed bus access and control arbitration Ralph Haines, Dan O'Neill, Stephen C. Pries, William V. Miller, Kent Bruce Waterson +8 more 1998-06-30 $4,201,000
5752269 Pipelined microprocessor that pipelines memory requests to an external memory Ralph Haines, Mario Nemirovsky, Alexander Perez 1998-05-12 $17,951,000
5752273 Apparatus and method for efficiently determining addresses for misaligned data stored in memory Mario Nemirovsky, Alexander Perez, Narendra Sankar 1998-05-12 $17,951,000
5717909 Code breakpoint decoder Mario Nemirovsky, Robert W. Williams 1998-02-10 $11,639,000
5680564 Pipelined processor with two tier prefetch buffer structure and method with bypass Mario Nemirovsky 1997-10-21 $32,049,000
5659712 Pipelined microprocessor that prevents the cache from being read when the contents of the cache are invalid Robert Alan Bignell 1997-08-19 $19,926,000