Issued Patents All Time
Showing 25 most recent of 37 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12430547 | AI accelerator integrated circuit chip with integrated cell-based fabric adapter | Ramalingam K. Anand, Kalyana S. Venkataraman, Berend Ozceri, Pradeep R. Joginipally, Chung Y. Lau +4 more | 2025-09-30 |
| 12293163 | Split accumulator with a shared adder | Jian Hui Huang | 2025-05-06 |
| 12271624 | Methods and systems for processing read-modify-write requests | Ashwin Radhakrishnan | 2025-04-08 |
| 12165041 | Low power hardware architecture for handling accumulation overflows in a convolution operation | Shabarivas Abhiram, Jian Hui Huang, Eugene M. Feinberg | 2024-12-10 |
| 12141685 | Low power hardware architecture for a convolutional neural network | Jian Hui Huang, James M. Bodwin, Pradeep R. Joginipally, Shabarivas Abhiram, Martin Stefan Patz +2 more | 2024-11-12 |
| 12045309 | Systems and methods for performing matrix multiplication with a plurality of processing elements | Jian Hui Huang | 2024-07-23 |
| 12039290 | Multiply accumulate (MAC) unit with split accumulator | Jian Hui Huang | 2024-07-16 |
| 12026478 | Multiply accumulate (MAC) unit with split accumulator | Jian Hui Huang | 2024-07-02 |
| 12008069 | Multi-mode architecture for unifying matrix multiplication, 1×1 convolution and 3×3 convolution | Jian Hui Huang | 2024-06-11 |
| 12007937 | Multi-mode architecture for unifying matrix multiplication, 1×1 convolution and 3×3 convolution | Jian Hui Huang | 2024-06-11 |
| 11915126 | Low power hardware architecture for a convolutional neural network | Jian Hui Huang, James M. Bodwin, Pradeep R. Joginipally, Shabarivas Abhiram, Martin Stefan Patz +2 more | 2024-02-27 |
| 11762946 | Systems for using shifter circuit and 3×3 convolver units to emulate functionality of larger sized convolver units | Shabarivas Abhiram | 2023-09-19 |
| 11645355 | Systems for evaluating a piecewise linear function | Gilles J. C. A. Backhus | 2023-05-09 |
| 11630605 | Methods and systems for processing read-modify-write requests | Ashwin Radhakrishnan | 2023-04-18 |
| 11496398 | Switch fabric packet flow reordering | Anuj Kumar Srivastava, Harshad B Agashe, Dinesh Jaiswal, Piyush Jain, Naveen Kumar Jain | 2022-11-08 |
| 11290395 | Emulating output queued behavior in a virtual output queue switch | Sarin Thomas, Jean-Marc Frailong, Harshad B Agashe | 2022-03-29 |
| 10951527 | Switch fabric packet flow reordering | Anuj Kumar Srivastava, Harshad B Agashe, Dinesh Jaiswal, Piyush Jain, Naveen Kumar Jain | 2021-03-16 |
| 10721187 | Emulating output queued behavior in a virtual output queue switch | Sarin Thomas, Jean-Marc Frailong, Harshad B Agashe | 2020-07-21 |
| 10009293 | Shared memory switch fabric system and method | Dev Shankar Mukherjee, Marco E. Rodriguez, Sarin Thomas | 2018-06-26 |
| 9021582 | Parallelized pattern matching using non-deterministic finite automata | Philip A. Thomas, Ramesh Panwar | 2015-04-28 |
| 8953625 | Applying backpressure to a subset of nodes in a deficit weighted round robin scheduler | Srihari Raju Vegesna | 2015-02-10 |
| 8954691 | Identifying unallocated memory segments | Robert Rhoades, Paul Kim | 2015-02-10 |
| 8520522 | Transmit-buffer management for priority-based flow control | Paul Kim, Chang-Hong Wu | 2013-08-27 |
| 8457142 | Applying backpressure to a subset of nodes in a deficit weighted round robin scheduler | Srihari Raju Vegesna | 2013-06-04 |
| 8392672 | Identifying unallocated memory segments | Robert Rhoades, Paul Kim | 2013-03-05 |