Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9319347 | Deadlock-resistant fabric tree replication in a network device | Pradeep Sindhu, Jean-Marc Frailong, Sarin Thomas, Srihari Raju Vegesna, David J. Ofelt | 2016-04-19 |
| 9237003 | Digital bit insertion for clock recovery | David P. Chengson | 2016-01-12 |
| 9100323 | Deadlock-resistant fabric tree replication in a network device | Pradeep Sindhu, Jean-Marc Frailong, Sarin Thomas, Srihari Raju Vegesna, David J. Ofelt | 2015-08-04 |
| 9077466 | Methods and apparatus for transmission of groups of cells via a switch fabric | Sarin Thomas, Srihari Raju Vegesna, Pradeep Sindhu, Chi-Chung Chen, Jean-Marc Frailong +2 more | 2015-07-07 |
| 8605722 | Deadlock-resistant fabric tree replication in a network device | Pradeep Sindhu, Jean-Marc Frailong, Sarin Thomas, Srihari Raju Vegesna, David J. Ofelt | 2013-12-10 |
| 8520522 | Transmit-buffer management for priority-based flow control | Gary S. Goldman, Paul Kim | 2013-08-27 |
| 8462802 | Hybrid weighted round robin (WRR) traffic scheduling | Aibing Zhou, John D. Johnson, David J. Ofelt | 2013-06-11 |
| 8452908 | Low latency serial memory interface | David P. Chengson | 2013-05-28 |
| 8325749 | Methods and apparatus for transmission of groups of cells via a switch fabric | Sarin Thomas, Srihari Raju Vegesna, Pradeep Sindhu, Chi-Chung Chen, Jean-Marc Frailong +2 more | 2012-12-04 |
| 7983290 | Preserving the order of packets through a device | Stefan Dyckerhoff, Pankaj Patel, Pradeep Sindhu, Ashok Krishnamurthi, Hann-Hwan Ju +2 more | 2011-07-19 |
| 7715449 | Preserving the order of packets through a device | Stefan Dyckerhoff, Pankaj Patel, Pradeep Sindhu, Ashok Krishnamurthi, Hann-Hwan Ju +2 more | 2010-05-11 |
| 7016367 | Systems and methods for allocating bandwidth for processing of packets | Stefan Dyckerhoff, Pankaj Patel, Pradeep Sindhu, Ashok Krishnamurthi, Hann-Hwan Ju +2 more | 2006-03-21 |
| 6810501 | Single cycle cyclic redundancy checker/generator | Dennis C. Ferguson, Devereaux C. Chen, Ramesh Padmanabhan, Thomas Michael Skibo | 2004-10-26 |
| 6675307 | Clock controller for controlling the switching to redundant clock signal without producing glitches by delaying the redundant clock signal to match a phase of primary clock signal | Ross Heitkamp | 2004-01-06 |
| 6429706 | Voltage sequencing circuit for powering-up sensitive electrical components | Dilip A. Amin, Ross Heitkamp, Michael Armstrong | 2002-08-06 |
| 6333650 | Voltage sequencing circuit for powering-up sensitive electrical components | Dilip A. Amin, Ross Heitkamp, Michael Armstrong | 2001-12-25 |
| 5912906 | Method and apparatus for recovering from correctable ECC errors | Gary R. Lauterbach | 1999-06-15 |