Issued Patents All Time
Showing 25 most recent of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11156651 | Electrical signature fault detection | Ranjeeth Doppalapudi | 2021-10-26 |
| 10455691 | Grid array pattern for crosstalk reduction | — | 2019-10-22 |
| 10455690 | Grid array pattern for crosstalk reduction | Ranjeeth Doppalapudi | 2019-10-22 |
| 10383213 | Placement of vias in printed circuit board circuits | Edward Chang, Ranjeeth Doppalapudi, Santosh Kumar Pappu | 2019-08-13 |
| 10365314 | Electrical signature fault detection | Ranjeeth Doppalapudi | 2019-07-30 |
| 10231325 | Placement of vias in printed circuit board circuits | Edward Chang, Ranjeeth Doppalapudi, Santosh Kumar Pappu | 2019-03-12 |
| 10069596 | Systems and methods for error detection and correction | Granthana Kattehalli Rangaswamy, David J. Ofelt, Edward C. Priest, Bhavesh Patel | 2018-09-04 |
| 9237003 | Digital bit insertion for clock recovery | Chang-Hong Wu | 2016-01-12 |
| 8675483 | Systems and methods for reducing reflections and frequency dependent dispersions in redundant links | Jaya Bandyopadhyay | 2014-03-18 |
| 8508248 | Testing vias formed in printed circuit boards | — | 2013-08-13 |
| 8452908 | Low latency serial memory interface | Chang-Hong Wu | 2013-05-28 |
| 8411695 | Multi-interface compatible bus over a common physical connection | Jaya Bandyopadhyay | 2013-04-02 |
| 8164392 | Error-free startup of low phase noise oscillators | Victor Do | 2012-04-24 |
| 8000351 | Source synchronous link with clock recovery and bit skew alignment | Joel Frederick Darnauer, Matthew A. Tucker | 2011-08-16 |
| 7924862 | Systems and methods for reducing reflections and frequency dependent dispersions in redundant links | Jaya Bandyopadhyay | 2011-04-12 |
| 7724761 | Systems and methods for reducing reflections and frequency dependent dispersions in redundant links | Jaya Bandyopadhyay | 2010-05-25 |
| 7515614 | Source synchronous link with clock recovery and bit skew alignment | Joel Frederick Darnauer, Matthew A. Tucker | 2009-04-07 |
| 7061939 | Source synchronous link with clock recovery and bit skew alignment | Joel Frederick Darnauer, Matthew A. Tucker | 2006-06-13 |
| 6646982 | Redundant source synchronous busses | — | 2003-11-11 |
| 6538518 | Multi-loop phase lock loop for controlling jitter in a high frequency redundant system | — | 2003-03-25 |
| 5999437 | Processor-inclusive memory module | William L. Schmidt, Unmesh Agarwala, Alan D. Foster, Edward C. Priest, John C. Manton +1 more | 1999-12-07 |
| 5867419 | Processor-inclusive memory module | William L. Schmidt, Unmesh Agarwala, Alan D. Foster, Edward C. Priest, John C. Manton +1 more | 1999-02-02 |
| 5811997 | Multi-configurable push-pull/open-drain driver circuit | Robert A. Conrad | 1998-09-22 |
| 5793259 | Apparatus for generating differential noise between power and ground planes | — | 1998-08-11 |
| 5790612 | System and method to reduce jitter in digital delay-locked loops | Hansel A. Collins, Edward C. Priest, Scott W. Alvarez | 1998-08-04 |