Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12107076 | Through-silicon via layout for multi-die integrated circuits | Wonjun Jung, Jasmeet Singh Narang, Tyrone Tung Huang, Christopher Klement, Alan Dodson Smith +1 more | 2024-10-01 |
| 11960339 | Multi-die stacked power delivery | Eric J. Chapman, Alan Dodson Smith | 2024-04-16 |
| 11233510 | In memory logic functions using memory arrays | John Wuu | 2022-01-25 |
| 10383213 | Placement of vias in printed circuit board circuits | David P. Chengson, Ranjeeth Doppalapudi, Santosh Kumar Pappu | 2019-08-13 |
| 10231325 | Placement of vias in printed circuit board circuits | David P. Chengson, Ranjeeth Doppalapudi, Santosh Kumar Pappu | 2019-03-12 |
| 8461902 | Multiplexer circuit with load balanced fanout characteristics | Josef A. Dvorak, Douglas R. Williams | 2013-06-11 |
| 7609096 | Frequency synthesizer and method for constructing the same | Deirdre McGlashan, Meimei Chang | 2009-10-27 |
| 7349448 | Distributed multiplexing circuit with built-in repeater | — | 2008-03-25 |
| 6664813 | Pseudo-NMOS logic having a feedback controller | Michael A. McCurdy | 2003-12-16 |
| 5954831 | Method for testing a memory device | — | 1999-09-21 |
| 5691956 | Memory with fast decoding | Deirdre S. Chang, Derek Chang | 1997-11-25 |