{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Pipelined microprocessor that prevents the cache from being read when the contents of the cache are invalid", "item": "https://www.patentleaderboard.com/patent/5659712"}]}
Skip to content