Issued Patents All Time
Showing 25 most recent of 33 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11416961 | Variable entry transitional ring storage for efficiently accessing graphics states | Sushant Kondguli | 2022-08-16 |
| 11315225 | Coarse depth culling during binning | Abhinav Golas, Nicholas Sohre | 2022-04-26 |
| 10643339 | Motion based adaptive rendering | Abhinav Golas, Karthik Ramani, Christopher T. Cheng, John Brothers, Liangjun Zhang +1 more | 2020-05-05 |
| 10515432 | Methods and apparatuses for managing graphics data using two-stage lookup tables in cache | Woong Seo | 2019-12-24 |
| 10262391 | Graphics processing devices and graphics processing methods | Seunghun Jin | 2019-04-16 |
| 10181176 | Efficient low-power texture cache architecture | Karthik Ramani, Woong Seo, Kwontaek Kwon, Jeongae Park | 2019-01-15 |
| 10061591 | Redundancy elimination in single instruction multiple data/thread (SIMD/T) execution processing | Boris Beylin, John Brothers, Lingjie XU, Maxim Lukyanov, Alex Grosul | 2018-08-28 |
| 10055810 | Cache architecture for efficiently accessing texture data using buffers | Karthik Ramani, Woong Seo, Kwontaek Kwon, Jeongae Park | 2018-08-21 |
| 9928610 | Motion based adaptive rendering | Abhinav Golas, Karthik Ramani, Christopher T. Cheng, John Brothers, Liangjun Zhang +1 more | 2018-03-27 |
| 9904971 | Adaptive desampling in a graphics system with composited level of detail map | Christopher T. Cheng, Liangjun Zhang, Ki Fung Chow | 2018-02-27 |
| 9754344 | Forward late predictive rendering in a graphics system | John Brothers | 2017-09-05 |
| 9652817 | Automated compute kernel fusion, resizing, and interleave | John Brothers, Joohoon Lee, Abhinav Golas, Seonggun Kim | 2017-05-16 |
| 7930694 | Method and apparatus for critical section prediction for intelligent lock elision | Craig Anderson, Stevan Vlaovic | 2011-04-19 |
| 7827383 | Efficient on-chip accelerator interfaces to reduce software overhead | Lawrence Spracklen, Adam R. Talcott | 2010-11-02 |
| 7809895 | Low overhead access to shared on-chip hardware accelerator with memory-based interfaces | Lawrence Spracklen, Adam R. Talcott, Sothea Soun, Sanjay Patel, Farnad Sajjadian | 2010-10-05 |
| 7793044 | Efficient caching of stores in scalable chip multi-threaded systems | Lawrence Spracklen, Yuan C. Chou | 2010-09-07 |
| 7757047 | Missing store operation accelerator | Lawrence Spracklen, Yuan C. Chou | 2010-07-13 |
| 7543112 | Efficient on-chip instruction and data caching for chip multiprocessors | Yuan C. Chou, Lawrence Spracklen | 2009-06-02 |
| 7529911 | Hardware-based technique for improving the effectiveness of prefetching during scout mode | Lawrence Spracklen, Yuan C. Chou | 2009-05-05 |
| 7475230 | Method and apparatus for performing register file checkpointing to support speculative execution within a processor | Yuan C. Chou | 2009-01-06 |
| 7472256 | Software value prediction using pendency records of predicted prefetch values | Sreekumar Nair | 2008-12-30 |
| 7434004 | Prefetch prediction | Lawrence Spracklen, Stevan Vlaovic, Darryl J. Gove | 2008-10-07 |
| 7434031 | Execution displacement read-write alias prediction | Lawrence Spracklen, Stevan Vlaovic | 2008-10-07 |
| 7373482 | Software-based technique for improving the effectiveness of prefetching during scout mode | Lawrence Spracklen, Yuan C. Chou | 2008-05-13 |
| 7340567 | Value prediction for missing read operations instances | Yuan C. Chou | 2008-03-04 |