Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11321604 | Systems and devices for compressing neural network parameters | Jiecao Yu, Andrew Lukefahr, David John Palframan, Ganesh Suryanarayan Dasika, Reetuparnda Das | 2022-05-03 |
| 11275996 | Systems and devices for formatting neural network parameters | Jiecao Yu, Andrew Lukefahr, David John Palframan, Ganesh Suryanarayan Dasika, Reetuparnda Das | 2022-03-15 |
| 10613866 | Method of detecting repetition of an out-of-order execution schedule, apparatus and computer-readable medium | Shruti Padmanabha, Andrew Lukefahr, Reetuparna Das | 2020-04-07 |
| 10585701 | Dynamically allocating storage elements to provide registers for processing thread groups | John Kloosterman, Jonathan Beaumont, Davoud A. Jamshidi, Jonathan Kenred Bailey, Trevor Nigel Mudge | 2020-03-10 |
| 10310858 | Controlling transition between using first and second processing circuitry | Andrew Lukefahr, Shruti Padmanabha, Reetuparna Das, Jiecao Yu | 2019-06-04 |
| 9965279 | Recording performance metrics to predict future execution of large instruction sequences on either high or low performance execution circuitry | Shruti Padmanabha, Andrew Lukefahr, Reetuparna Das | 2018-05-08 |
| 9898333 | Method and apparatus for selecting preemption technique | Jason Jong Kyu Park, Donghoon YOO | 2018-02-20 |
| 9898409 | Issue control for multithreaded processing | Ankit Sethia | 2018-02-20 |
| 9870226 | Control of switching between executed mechanisms | Shruti Padmanabha, Andrew Lukefahr, Reetuparna Das | 2018-01-16 |
| 9652262 | Operation parameter control based upon queued instruction characteristics | Ankit Sethia | 2017-05-16 |
| 9639363 | Heterogeneity within a processor core | Andrew Lukefahr, Reetuparna Das, Shruti Padmanabha | 2017-05-02 |
| 9342478 | Processor with reconfigurable architecture including a token network simulating processing of processing elements | Heejun Shim, Sukjin Kim, Hyunchul Park, Yongjun Park | 2016-05-17 |
| 9329846 | Cooperative program code transformation | David I. August, Kevin Fan, Jae Wook Lee, Mojtaba Mehrara | 2016-05-03 |
| 8813073 | Compiling apparatus and method of a multicore device | Ki-Seok Kwon, Suk-jin Kim, Yong-Jun Park | 2014-08-19 |
| 8505002 | Translation of SIMD instructions in a data processing system | Sami Yehia, Krisztian Flautner, Nathan Clark, Amir Hormati | 2013-08-06 |
| 8219885 | Error detecting and correcting mechanism for a register file | Daryl Wayne Bradley, Jason Andrew Blome | 2012-07-10 |
| 7685404 | Program subgraph identification | Stuart David Biles, Krisztian Flautner, Nathan Clark | 2010-03-23 |
| 7350055 | Tightly coupled accelerator | Stuart David Biles, Krisztian Flautner, Nathan Clark | 2008-03-25 |
| 7343482 | Program subgraph identification | Stuart David Biles, Krisztian Flautner, Nathan Clark | 2008-03-11 |
| 7318143 | Reuseable configuration data | Stuart David Biles, Krisztian Flautner, Nathan Clark | 2008-01-08 |
| 6772106 | Retargetable computer design system | Santosh Abraham, Vinod K. Kathail | 2004-08-03 |
| 6604067 | Rapid design of memory systems using dilation modeling | Santosh Abraham, Bantwal R. Rau | 2003-08-05 |
| 6408428 | Automated design of processor systems using feedback from internal measurements of candidate systems | Michael Schlansker, Vinod K. Kathail, Greg Snider, Shail Aditya Gupta, Santosh Abraham | 2002-06-18 |
| 5857104 | Synthetic dynamic branch prediction | Balas K. Natarjan | 1999-01-05 |