Issued Patents All Time
Showing 26–49 of 49 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7293162 | Split data-flow scheduling mechanism | Michael G. Butler | 2007-11-06 |
| 6519730 | Computer and error recovery method for the same | Hisashige Ando, Toshiaki Kitamura, Michael G. Butler | 2003-02-11 |
| 5966530 | Structure and method for instruction boundary machine state restoration | Gene W. Shen, John Szeto, Niteen A. Patkar | 1999-10-12 |
| 5896526 | Programmable instruction trap system and method | Sunil W. Savkar, Gene W. Shen, Farnad Sajjadian | 1999-04-20 |
| 5896528 | Superscalar processor with multiple register windows and speculative return address generation | Akira Katsuno, Sunil W. Savkar | 1999-04-20 |
| 5838940 | Method and apparatus for rotating active instructions in a parallel data processor | Sunil W. Savkar, Gene W. Shen, Farnad Sajjadian | 1998-11-17 |
| 5784586 | Addressing method for executing load instructions out of order with respect to store instructions | Michael A. Simone | 1998-07-21 |
| 5751985 | Processor structure and method for tracking instruction status to maintain precise state | Gene W. Shen, John Szeto, Niteen A. Patkar | 1998-05-12 |
| 5745726 | Method and apparatus for selecting the oldest queued instructions without data dependencies | John Gmuender, Michael A. Simone, John Szeto, Takumi Maruyama, DeForest Tovey | 1998-04-28 |
| 5740414 | Method and apparatus for coordinating the use of physical registers in a microprocessor | DeForest Tovey, John Gmuender | 1998-04-14 |
| 5708788 | Method for adjusting fetch program counter in response to the number of instructions fetched and issued | Akira Katsuno, Niteen A. Patkar, Sunil W. Savkar | 1998-01-13 |
| 5675759 | Method and apparatus for register management using issue sequence prior physical register and register association validity information | Gene W. Shen, Ravi Swami, Niteen A. Patkar | 1997-10-07 |
| 5673408 | Processor structure and method for renamable trap-stack | Hideki Osone | 1997-09-30 |
| 5673426 | Processor structure and method for tracking floating-point exceptions | Gene W. Shen, John Szeto | 1997-09-30 |
| 5659721 | Processor structure and method for checkpointing instructions to maintain precise state | Gene W. Shen, John Szeto, Niteen A. Patkar | 1997-08-19 |
| 5655115 | Processor structure and method for watchpoint of plural simultaneous unresolved branch evaluation | Gene W. Shen, Hideki Osone, Takumi Maruyama | 1997-08-05 |
| 5651124 | Processor structure and method for aggressively scheduling long latency instructions including load/store instructions while maintaining precise state | Gene W. Shen, John Szeto, Niteen A. Patkar, Michael A. Simone | 1997-07-22 |
| 5649136 | Processor structure and method for maintaining and restoring precise state at any instruction boundary | Gene W. Shen, John Szeto, Niteen A. Patkar | 1997-07-15 |
| 5644742 | Processor structure and method for a time-out checkpoint | Gene W. Shen, John Szeto, Niteen A. Patkar | 1997-07-01 |
| 5367494 | Randomly accessible memory having time overlapping memory accesses | Mitchell Alsup, Hunter Ledbetter Scales, III, George P. Hoekstra | 1994-11-22 |
| 5355457 | Data processor for performing simultaneous instruction retirement and backtracking | Mitchell Alsup | 1994-10-11 |
| 4667286 | Method and apparatus for transferring data between a disk and a central processing unit | Mark Young, John Drew | 1987-05-19 |
| 4667326 | Method and apparatus for error detection and correction in systems comprising floppy and/or hard disk drives | Mark Young, John Drew | 1987-05-19 |
| 4618898 | Method and apparatus for reading a disk | Mark Young, John Drew, Vineet Dujari | 1986-10-21 |