| 5966530 |
Structure and method for instruction boundary machine state restoration |
Gene W. Shen, Niteen A. Patkar, Michael C. Shebanow |
1999-10-12 |
| 5751985 |
Processor structure and method for tracking instruction status to maintain precise state |
Gene W. Shen, Niteen A. Patkar, Michael C. Shebanow |
1998-05-12 |
| 5745726 |
Method and apparatus for selecting the oldest queued instructions without data dependencies |
Michael C. Shebanow, John Gmuender, Michael A. Simone, Takumi Maruyama, DeForest Tovey |
1998-04-28 |
| 5673426 |
Processor structure and method for tracking floating-point exceptions |
Gene W. Shen, Michael C. Shebanow |
1997-09-30 |
| 5659721 |
Processor structure and method for checkpointing instructions to maintain precise state |
Gene W. Shen, Niteen A. Patkar, Michael C. Shebanow |
1997-08-19 |
| 5651124 |
Processor structure and method for aggressively scheduling long latency instructions including load/store instructions while maintaining precise state |
Gene W. Shen, Niteen A. Patkar, Michael C. Shebanow, Michael A. Simone |
1997-07-22 |
| 5649136 |
Processor structure and method for maintaining and restoring precise state at any instruction boundary |
Gene W. Shen, Niteen A. Patkar, Michael C. Shebanow |
1997-07-15 |
| 5644742 |
Processor structure and method for a time-out checkpoint |
Gene W. Shen, Niteen A. Patkar, Michael C. Shebanow |
1997-07-01 |
