Issued Patents All Time
Showing 25 most recent of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11552183 | Transistors with oxide liner in drift region | Henry Litzmann Edwards | 2023-01-10 |
| 11152505 | Drain extended transistor | Alexei Sadovnikov, Henry Litzmann Edwards, Dhanoop Varghese, Xiaoju Wu, Binghua Hu +1 more | 2021-10-19 |
| 10937574 | Vertically-constructed, temperature-sensing resistors and methods of making the same | Gregory Cestra | 2021-03-02 |
| 10748818 | Dynamic biasing to mitigate electrical stress in integrated resistors | Tathagata Chatterjee, Steven Loveless, James Robert Todd | 2020-08-18 |
| 10714594 | Transistors with oxide liner in drift region | Henry Litzmann Edwards | 2020-07-14 |
| 10431357 | Vertically-constructed, temperature-sensing resistors and methods of making the same | Gregory Cestra | 2019-10-01 |
| 10153269 | Low dynamic resistance low capacitance diodes | Alexei Sadovnikov, Gang Xue, Dening Wang | 2018-12-11 |
| 9905428 | Split-gate lateral extended drain MOS transistor structure and process | Alexei Sadovnikov, Christopher Boguslaw Kocon | 2018-02-27 |
| 9831135 | Method of forming a biCMOS semiconductor chip that increases the betas of the bipolar transistors | Natalia Lavrovskaya, Alexei Sadovnikov | 2017-11-28 |
| 9773777 | Low dynamic resistance low capacitance diodes | Alexei Sadovnikov, Gang Xue, Dening Wang | 2017-09-26 |
| 9595480 | Method of forming a BICMOS semiconductor chip that increases the betas of the bipolar transistors | Natalia Lavrovskaya, Alexei Sadovnikov | 2017-03-14 |
| 8686502 | Schottky diode integrated into LDMOS | Venkat Raghavan | 2014-04-01 |
| 8664076 | Method of forming a robust, modular MIS (metal-insulator-semiconductor) capacitor with improved capacitance density | Venkat Raghavan | 2014-03-04 |
| 8541863 | Data retention in a single poly EPROM cell | Venkat Raghavan | 2013-09-24 |
| 8445353 | Method for integrating MIM capacitor and thin film resistor in modular two layer metal process and corresponding device | Venkat Raghavan, Sheldon Douglas Haynie | 2013-05-21 |
| 8086979 | Method for designing and manufacturing a PMOS device with drain junction breakdown point located for reduced drain breakdown voltage walk-in | Douglas Brisbin | 2011-12-27 |
| 7560348 | Method for designing and manufacturing a PMOS device with drain junction breakdown point located for reduced drain breakdown voltage walk-in | Douglas Brisbin | 2009-07-14 |
| 7510944 | Method of forming a MIM capacitor | Venkat Raghavan | 2009-03-31 |
| 7425741 | EEPROM structure with improved data retention utilizing biased metal plate and conductive layer exclusion | Natalia Lavrovskaya, Saurabh Desai, Roozbeh Parsa, Yuri Mirgorodski | 2008-09-16 |
| 7192853 | Method of improving the breakdown voltage of a diffused semiconductor junction | Vladislav Vashchenko | 2007-03-20 |
| 7180140 | PMOS device with drain junction breakdown point located for reduced drain breakdown voltage walk-in and method for designing and manufacturing such device | Douglas Brisbin | 2007-02-20 |
| 7071513 | Layout optimization of integrated trench VDMOS arrays | Terry Dyer | 2006-07-04 |
| 7067879 | Integration of trench power transistors into a 1.5 μm BCD process | Terry Dyer, Jim McGinty, Constantin Bulucea | 2006-06-27 |
| 6798641 | Low cost, high density diffusion diode-capacitor | Peter J. Hopper, Philipp Lindorfer, Vladislav Vashchenko | 2004-09-28 |
| 6646320 | Method of forming contact to poly-filled trench isolation region | — | 2003-11-11 |