SD

Saurabh Desai

NS National Semiconductor: 7 patents #267 of 2,238Top 15%
TI Texas Instruments: 2 patents #5,248 of 12,488Top 45%
AD Analog Devices: 1 patents #1,102 of 1,943Top 60%
📍 Fremont, CA: #1,763 of 9,298 inventorsTop 20%
🗺 California: #60,666 of 386,348 inventorsTop 20%
Overall (All Time): #515,338 of 4,157,543Top 15%
10
Patents All Time

Issued Patents All Time

Showing 1–10 of 10 patents

Patent #TitleCo-InventorsDate
8669157 Non-volatile memory cell having a heating element and a substrate-based control gate Jeffrey A. Babcock, Yuri Mirgorodski, Natalia Lavrovskaya 2014-03-11
8247862 Method of enhancing charge storage in an E2PROM cell Jeff Babcock, Yuri Mirgorodski, Natalia Lavrovskaya 2012-08-21
8207559 Schottky junction-field-effect-transistor (JFET) structures and methods of forming JFET structures Jeffrey A. Babcock, Natalia Lavrovskaya, Alexei Sadovnikov, Zia A. Shafi 2012-06-26
8183621 Non-volatile memory cell having a heating element and a substrate-based control gate Jeffrey A. Babcock, Yuri Mirgorodski, Natalia Lavrovskaya 2012-05-22
7919807 Non-volatile memory cell with heating element Jeffrey A. Babcock, Yuri Mirgorodski, Natalia Lavrovskaya 2011-04-05
7919805 Non-volatile memory cell with two capacitors and one PNP transistor and a method of forming such a cell in a 1-poly SOI technology Yuri Mirgorodski, Natalia Lavrovskaya 2011-04-05
7719048 Heating element for enhanced E2PROM Jeff Babcock, Yuri Mirgorodski, Natalia Lavrovskaya 2010-05-18
7663173 Non-volatile memory cell with poly filled trench as control gate and fully isolated substrate as charge storage Natasha Lavrovskaya, Yuri Mirgorodski, Jeff Babcock 2010-02-16
7425741 EEPROM structure with improved data retention utilizing biased metal plate and conductive layer exclusion Andrew Strachan, Natalia Lavrovskaya, Roozbeh Parsa, Yuri Mirgorodski 2008-09-16
5262345 Complimentary bipolar/CMOS fabrication method Mohammad Nasser, Derek F. Bowers 1993-11-16