NS

Natarajan Seshan

MY Mythic: 2 patents #23 of 30Top 80%
📍 Houston, TX: #1,144 of 21,073 inventorsTop 6%
🗺 Texas: #7,815 of 125,132 inventorsTop 7%
Overall (All Time): #253,103 of 4,157,543Top 7%
18
Patents All Time

Issued Patents All Time

Showing 1–18 of 18 patents

Patent #TitleCo-InventorsDate
11475973 Systems and methods for implementing redundancy for tile-based intelligence processing computing architecture Malav Parikh, Zainab Nasreen Zaidi, Sergio Schuler, Raul A. Garibay, Jr., David Fick 2022-10-18
11049586 Systems and methods for implementing redundancy for tile-based intelligence processing computing architecture Malav Parikh, Zainab Nasreen Zaidi, Sergio Schuler, Raul A. Garibay, Jr., David Fick 2021-06-29
6889320 Microprocessor with an instruction immediately next to a branch instruction for adding a constant to a program counter Alan L. Davis, Richard H. Scales, Eric Stotzer, Reid E. Tatge 2005-05-03
6374346 Processor with conditional execution of every instruction Laurence R. Simar, Reid E. Tatge, Alan L. Davis 2002-04-16
6351758 Bit and digit reversal methods Chad Courtney 2002-02-26
6289443 Self-priming loop execution for loop prolog instruction Richard H. Scales 2001-09-11
6182203 Microprocessor Laurence R. Simar, Richard H. Scales 2001-01-30
6112298 Method for managing an instruction execution pipeline during debugging of a data processing system Douglas E. Deao 2000-08-29
6081885 Method and apparatus for halting a processor and providing state visibility on a pipeline phase basis Douglas E. Deao 2000-06-27
6065106 Resuming normal execution by restoring without refetching instructions in multi-word instruction register interrupted by debug instructions loading and processing Douglas E. Deao 2000-05-16
6058474 Method and apparatus for DMA boot loading a microprocessor without an internal ROM Philip K. Baltz, Ron A. Shipp 2000-05-02
6055649 Processor test port with scan chains and data streaming Douglas E. Deao, Anthony Lell 2000-04-25
6055628 Microprocessor with a nestable delayed branch instruction without branch related pipeline interlocks Laurence R. Simar 2000-04-25
6016555 Non-intrusive software breakpoints in a processor instruction execution pipeline Douglas E. Deao 2000-01-18
5970241 Maintaining synchronism between a processor pipeline and subsystem pipelines during debugging of a data processing system Douglas E. Deao, Anthony Lell 1999-10-19
5958044 Multicycle NOP Richard A. Brown, Ray L. Simar, Jr. 1999-09-28
5862159 Parallelized cyclical redundancy check method 1999-01-19
5841379 Method and apparatus for selectively counting consecutive bits Laurence R. Simar 1998-11-24