Issued Patents All Time
Showing 26–50 of 69 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5268590 | CMOS device and process | Thomas C. Mele, Young Limb | 1993-12-07 |
| 5264380 | Method of making an MOS transistor having improved transconductance and short channel characteristics | — | 1993-11-23 |
| 5241193 | Semiconductor device having a thin-film transistor and process | James D. Hayden | 1993-08-31 |
| 5236862 | Method of forming oxide isolation | Prashant U. Kenkare | 1993-08-17 |
| 5212110 | Method for forming isolation regions in a semiconductor device | Howard C. Kirsch | 1993-05-18 |
| 5204281 | Method of making dynamic random access memory cell having a trench capacitor | — | 1993-04-20 |
| 5200352 | Transistor having a lightly doped region and method of formation | — | 1993-04-06 |
| 5182619 | Semiconductor device having an MOS transistor with overlapped and elevated source and drain | — | 1993-01-26 |
| 5166084 | Process for fabricating a silicon on insulator field effect transistor | — | 1992-11-24 |
| 5141895 | Semiconductor device process using diffusant penetration and source layers for shallow regions | Howard C. Kirsch | 1992-08-25 |
| 5083190 | Shared gate CMOS transistor | — | 1992-01-21 |
| 5082794 | Method of fabricating MOS transistors using selective polysilicon deposition | Frank K. Baker, Jr., Richard D. Sivan | 1992-01-21 |
| 5070029 | Semiconductor process using selective deposition | James D. Hayden | 1991-12-03 |
| 5047812 | Insulated gate field effect device | — | 1991-09-10 |
| 5024959 | CMOS process using doped glass layer | — | 1991-06-18 |
| 5021354 | Process for manufacturing a semiconductor device | — | 1991-06-04 |
| 5010030 | Semiconductor process using selective deposition | James D. Hayden | 1991-04-23 |
| 4997785 | Shared gate CMOS transistor | — | 1991-03-05 |
| 4992388 | Short channel IGFET process | — | 1991-02-12 |
| 4988632 | Bipolar process using selective silicon deposition | — | 1991-01-29 |
| 4984042 | MOS transistors using selective polysilicon deposition | Frank K. Baker, Jr., Richard D. Sivan | 1991-01-08 |
| 4978626 | LDD transistor process having doping sensitive endpoint etching | Stephen S. Poon, Frank K. Baker, Jr., Jeffrey L. Klein | 1990-12-18 |
| 4966864 | Contact structure and method | — | 1990-10-30 |
| 4948745 | Process for elevated source/drain field effect structure | Richard D. Sivan | 1990-08-14 |
| 4948747 | Method of making an integrated circuit resistor | — | 1990-08-14 |