Issued Patents All Time
Showing 26–39 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5519237 | Semiconductor memory device | Hiromi Itoh, Keiichiro Kashihara | 1996-05-21 |
| 5489791 | Field effect transistor having impurity regions of different depths and manufacturing method thereof | Hideaki Arima, Makoto Ohi, Natsuo Ajika, Atsushi Hachisuka | 1996-02-06 |
| 5459345 | Semiconductor device high dielectric capacitor with narrow contact hole | Keiichiro Kashihara | 1995-10-17 |
| 5453952 | Semiconductor device having peripheral circuit formed of TFT (thin film transistor) | Kaoru Motonami | 1995-09-26 |
| 5442213 | Semiconductor device with high dielectric capacitor having sidewall spacers | Takeharu Kuroiwa, Nobuo Fujiwara, Keiichiro Kashihara | 1995-08-15 |
| 5428239 | Semiconductor device having retrograde well and diffusion-type well | Yoshinori Okumura, Hideaki Arima | 1995-06-27 |
| 5418388 | Semiconductor device having a capacitor with an adhesion layer | Takeharu Kuroiwa | 1995-05-23 |
| 5404042 | Semiconductor memory device having a plurality of well regions of different conductivities | Yoshinori Okumura, Hideaki Arima | 1995-04-04 |
| 5364811 | Method of manufacturing a semiconductor memory device with multiple device forming regions | Natsuo Ajika, Hideaki Arima, Kaoru Motonami, Atsushi Hachisuka | 1994-11-15 |
| 5276344 | Field effect transistor having impurity regions of different depths and manufacturing method thereof | Hideaki Arima, Makoto Ohi, Natsuo Ajika, Atsushi Hachisuka | 1994-01-04 |
| 5229314 | Method of manufacturing field effect transistor having a multilayer interconnection layer therein with tapered sidewall insulation | Hideaki Arima, Makoto Ohi, Kaoru Motonami, Yasushi Matsui | 1993-07-20 |
| 5218219 | Semiconductor memory device having a peripheral wall at the boundary region of a memory cell array region and a peripheral circuit region | Natsuo Ajika, Hideaki Arima, Kaoru Motonami, Atsushi Hachisuka | 1993-06-08 |
| 5164806 | Element isolating structure of semiconductor device suitable for high density integration | Masao Nagatomo, Hiroki Shimano, Yoshinori Okumura | 1992-11-17 |
| 5157469 | Field effect transistor having a multilayer interconnection layer therein with tapered sidewall insulators | Hideaki Arima, Makoto Ohi, Kaoru Motonami, Yasushi Matsui | 1992-10-20 |