Issued Patents All Time
Showing 151–175 of 190 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8051358 | Error recovery storage along a nand-flash string | — | 2011-11-01 |
| 8046542 | Fault-tolerant non-volatile integrated circuit memory | — | 2011-10-25 |
| 8023334 | Program window adjust for memory cell signal line delay | Jung Sheng Hoei, Jonathan Pabustan, Vishal Sarin, Frankie F. Roohparvar | 2011-09-20 |
| 7996727 | Error correction for memory | — | 2011-08-09 |
| 7990763 | Memory with weighted multi-page read | — | 2011-08-02 |
| 7990391 | Memory system having multiple address allocation formats and method for use thereof | — | 2011-08-02 |
| 7930612 | Error detection and correction scheme for a memory device | Shuba Swaminathan, Brady L. Keays | 2011-04-19 |
| 7916148 | Memory system and method for improved utilization of read and write bandwidth of a graphics processing system | — | 2011-03-29 |
| 7900162 | Read strobe feedback in a memory system | — | 2011-03-01 |
| 7881134 | Replacing defective columns of memory cells in response to external addresses | Vishal Sarin, Dzung H. Nguyen | 2011-02-01 |
| 7861139 | Programming management data for NAND memories | Michael G. Murray | 2010-12-28 |
| 7848142 | Fractional bits in memory cells | — | 2010-12-07 |
| 7810017 | Variable sector-count ECC | — | 2010-10-05 |
| 7774683 | Erasure pointer error correction | Brady L. Keays, Shuba Swaminathan | 2010-08-10 |
| 7770079 | Error scanning in flash memory | Peter Feeley, Siamack Nemazie | 2010-08-03 |
| 7747903 | Error correction for memory | — | 2010-06-29 |
| 7738292 | Flash memory with multi-bit read | — | 2010-06-15 |
| 7739576 | Variable strength ECC | — | 2010-06-15 |
| 7724262 | Memory system and method for improved utilization of read and write bandwidth of a graphics processing system | — | 2010-05-25 |
| 7512909 | Read strobe feedback in a memory system | — | 2009-03-31 |
| 7453723 | Memory with weighted multi-page read | — | 2008-11-18 |
| 7444579 | Non-systematic coded error correction | Shuba Swaminathan, Brady L. Keays | 2008-10-28 |
| 7397477 | Memory system having multiple address allocation formats and method for use thereof | — | 2008-07-08 |
| 7389465 | Error detection and correction scheme for a memory device | Shuba Swaminathan, Brady L. Keays | 2008-06-17 |
| 7379068 | Memory system and method for improved utilization of read and write bandwidth of a graphics processing system | — | 2008-05-27 |