Issued Patents All Time
Showing 176–190 of 190 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7369434 | Flash memory with multi-bit read | — | 2008-05-06 |
| 7322002 | Erasure pointer error correction | Brady L. Keays, Shuba Swaminathan | 2008-01-22 |
| 7180522 | Apparatus and method for distributed memory control in a graphics processing system | James Peterson | 2007-02-20 |
| 7139182 | Cutting CAM peak power by clock regioning | — | 2006-11-21 |
| 6963343 | Apparatus and method for dynamically disabling faulty embedded memory in a graphic processing system | James Peterson | 2005-11-08 |
| 6956577 | Embedded memory system and method including data error correction | Atif Sarwari | 2005-10-18 |
| 6856529 | Cutting CAM peak power by clock regioning | — | 2005-02-15 |
| 6816165 | Memory system having multiple address allocation formats and method for use thereof | — | 2004-11-09 |
| 6791555 | Apparatus and method for distributed memory control in a graphics processing system | James Peterson | 2004-09-14 |
| 6784889 | Memory system and method for improved utilization of read and write bandwidth of a graphics processing system | — | 2004-08-31 |
| 6741253 | Embedded memory system and method including data error correction | Atif Sarwari | 2004-05-25 |
| 6734865 | Method and system for mapping various length data regions | James Peterson | 2004-05-11 |
| 6646646 | Memory system having programmable multiple and continuous memory regions and method of use thereof | James Peterson | 2003-11-11 |
| 5751699 | Multidimensional aspects of an ASIC bus structure | — | 1998-05-12 |
| 5555540 | ASIC bus structure | — | 1996-09-10 |