Issued Patents All Time
Showing 176–200 of 320 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6496440 | Method and system for accessing rows in multiple memory banks within an integrated circuit | — | 2002-12-17 |
| 6490207 | Delay-locked loop with binary-coupled capacitor | — | 2002-12-03 |
| 6490224 | Delay-locked loop with binary-coupled capacitor | — | 2002-12-03 |
| 6483757 | Delay-locked loop with binary-coupled capacitor | — | 2002-11-19 |
| 6484244 | Method and system for storing and processing multiple memory commands | — | 2002-11-19 |
| 6477675 | Method and apparatus for generating expect data from a captured bit pattern, and memory device using same | — | 2002-11-05 |
| 6477631 | Memory device with pipelined address path | Chris G. Martin | 2002-11-05 |
| 6472905 | Voltage level translator | — | 2002-10-29 |
| 6469542 | Voltage level translator | — | 2002-10-22 |
| 6449210 | Semiconductor memory array architecture | — | 2002-09-10 |
| 6445624 | Method of synchronizing read timing in a high speed memory system | Jeffery W. Janzen, Chris G. Martin, Brent Keeth | 2002-09-03 |
| 6442644 | Memory system having synchronous-link DRAM (SLDRAM) devices and controller | David Gustavson, David V. James, Hans A. Wiggers, Peter B. Gillingham, Cormac Michael O'Connell +9 more | 2002-08-27 |
| 6434684 | Method and apparatus for coupling signals across different clock domains, and memory device and computer system using same | — | 2002-08-13 |
| 6415390 | Method and apparatus for controlling the data rate of a clocking circuit | — | 2002-07-02 |
| 6412052 | Method and apparatus for detecting an initialization signal and a command packet error in packetized dynamic random access memories | Brent Keeth | 2002-06-25 |
| 6407955 | Integrated circuit having an on-board reference generator | — | 2002-06-18 |
| 6400641 | Delay-locked loop with binary-coupled capacitor | — | 2002-06-04 |
| 6393378 | Circuit and method for specifying performance parameters in integrated circuits | — | 2002-05-21 |
| 6381180 | Distributed write data drivers for burst access memories | Todd A. Merritt | 2002-04-30 |
| 6380635 | Apparatus and methods for coupling conductive leads of semiconductor assemblies | Michael B. Ball | 2002-04-30 |
| 6374360 | Method and apparatus for bit-to-bit timing correction of a high speed memory bus | Brent Keeth, Terry R. Lee, Kevin J. Ryan | 2002-04-16 |
| 6370627 | Memory device command buffer apparatus and method and memory devices and computer systems using same | — | 2002-04-09 |
| 6366991 | Method and apparatus for coupling signals between two circuits operating in different clock domains | — | 2002-04-02 |
| 6366992 | Method and system for bypassing pipelines in a pipelined memory command generator | — | 2002-04-02 |
| 6363018 | Methods and apparatus for reading memory device register data | — | 2002-03-26 |