Issued Patents All Time
Showing 126–150 of 320 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7161372 | Input system for an operations circuit | — | 2007-01-09 |
| 7151707 | Memory device and method having data path with multiple prefetch I/O configurations | Brent Keeth, Brian Johnson | 2006-12-19 |
| 7088625 | Distributed write data drivers for burst access memories | Todd A. Merritt | 2006-08-08 |
| 7085975 | Method and apparatus for generating expect data from a captured bit pattern, and memory device using same | — | 2006-08-01 |
| 7075857 | Distributed write data drivers for burst access memories | Todd A. Merritt | 2006-07-11 |
| 7057967 | Multi-mode synchronous memory device and methods of operating and testing same | Brian Johnson, Brent Keeth, Jeffrey W. Janzen, Chris G. Martin | 2006-06-06 |
| 7054207 | Method and system for selecting redundant rows and columns of memory cells | Brent Keeth, Chris G. Martin, Ebrahim H. Hargan | 2006-05-30 |
| 7038966 | Memory device and method having data path with multiple prefetch I/O configurations | Brent Keeth, Brian Johnson | 2006-05-02 |
| 7031215 | Memory device and method having data path with multiple prefetch I/O configurations | Brent Keeth, Brian Johnson | 2006-04-18 |
| 6959016 | Method and apparatus for adjusting the timing of signals over fine and coarse ranges | Brent Keeth | 2005-10-25 |
| 6914830 | Distributed write data drivers for burst access memories | Todd A. Merritt | 2005-07-05 |
| 6909196 | Method and structures for reduced parasitic capacitance in integrated circuit metallizations | Shubneesh Batra, Michael Chaine, Brent Keeth, Salman Akram, Brian Johnson +3 more | 2005-06-21 |
| 6882579 | Memory device and method having data path with multiple prefetch I/O configurations | Brent Keeth, Brian Johnson | 2005-04-19 |
| 6853590 | Methods and apparatus for reading memory device register data | — | 2005-02-08 |
| 6851016 | System latency levelization for read data | Jeffery W. Janzen, Brent Keeth, Kevin J. Ryan, Brian Johnson | 2005-02-01 |
| 6847583 | Method of synchronizing read timing in a high speed memory system | Jeffery W. Janzen, Chris G. Martin, Brent Keeth | 2005-01-25 |
| 6842398 | Multi-mode synchronous memory device and methods of operating and testing same | Brian Johnson, Brent Keeth, Jeffrey W. Janzen, Chris G. Martin | 2005-01-11 |
| 6807114 | Method and system for selecting redundant rows and columns of memory cells | Brent Keeth, Chris G. Martin, Ebrahim H. Hargan | 2004-10-19 |
| 6804743 | Two step memory device command buffer apparatus and method and memory devices and computer systems using same | — | 2004-10-12 |
| 6781397 | Electrical communication system for circuitry | — | 2004-08-24 |
| 6778453 | METHOD OF STORING A TEMPERATURE THRESHOLD IN AN INTEGRATED CIRCUIT, METHOD OF MODIFYING OPERATION OF DYNAMIC RANDOM ACCESS MEMORY IN RESPONSE TO TEMPERATURE, PROGRAMMABLE TEMPERATURE SENSING CIRCUIT AND MEMORY INTEGRATED CIRCUIT | Christopher B. Cooper, Ming-Bo Liu, Chris G. Martin, Stephen L. Casper, Charles H. Dennison +3 more | 2004-08-17 |
| 6775755 | Method and apparatus for coupling signals across different clock domains, and memory device and computer system using same | — | 2004-08-10 |
| 6757799 | Memory device with pipelined address path | Chris G. Martin | 2004-06-29 |
| 6728142 | Distributed write data drivers for burst access memories | Todd A. Merritt | 2004-04-27 |
| 6724666 | Method of synchronizing read timing in a high speed memory system | Jeffery W. Janzen, Chris G. Martin, Brent Keeth | 2004-04-20 |