Issued Patents All Time
Showing 151–175 of 320 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6708262 | Memory device command signal generator | — | 2004-03-16 |
| 6697926 | Method and apparatus for determining actual write latency and accurately aligning the start of data capture with the arrival of data at a memory device | Brian Johnson, Brent Keeth | 2004-02-24 |
| 6693836 | Memory device and method having data path with multiple prefetch I/O configurations | Brent Keeth, Brian Johnson | 2004-02-17 |
| 6690609 | Memory device and method having data path with multiple prefetch I/O configurations | Brent Keeth, Brian Johnson | 2004-02-10 |
| 6683814 | Memory device and method having data path with multiple prefetch I/O configurations | Brent Keeth, Brian Johnson | 2004-01-27 |
| 6678205 | Multi-mode synchronous memory device and method of operating and testing same | Brian Johnson, Brent Keeth, Jeffrey W. Janzen, Chris G. Martin | 2004-01-13 |
| 6665223 | Memory device and method having data path with multiple prefetch I/O configurations | Brent Keeth, Brian Johnson | 2003-12-16 |
| 6662304 | Method and apparatus for bit-to-bit timing correction of a high speed memory bus | Brent Keeth, Terry R. Lee, Kevin J. Ryan | 2003-12-09 |
| 6658523 | System latency levelization for read data | Jeffery W. Janzen, Brent Keeth, Kevin J. Ryan, Brian Johnson | 2003-12-02 |
| 6654293 | Methods and apparatus for reading memory device register data | — | 2003-11-25 |
| 6647523 | Method for generating expect data from a captured bit pattern, and memory device using same | — | 2003-11-11 |
| 6602778 | Apparatus and methods for coupling conductive leads of semiconductor assemblies | Michael B. Ball | 2003-08-05 |
| 6600359 | Circuit having a long device configured for testing | — | 2003-07-29 |
| 6570807 | Intermediate boosted array voltage | — | 2003-05-27 |
| 6552945 | METHOD FOR STORING A TEMPERATURE THRESHOLD IN AN INTEGRATED CIRCUIT, METHOD FOR STORING A TEMPERATURE THRESHOLD IN A DYNAMIC RANDOM ACCESS MEMORY, METHOD OF MODIFYING DYNAMIC RANDOM ACCESS MEMORY OPERATION IN RESPONSE TO TEMPERATURE, PROGRAMMABLE TEMPERATURE SENSING CIRCUIT AND MEMORY INTEGRATED CIRCUIT | Christopher B. Cooper, Ming-Bo Liu, Chris G. Martin, Stephen L. Casper, Charles H. Dennison +3 more | 2003-04-22 |
| 6542569 | Memory device command buffer apparatus and method and memory devices and computer systems using same | — | 2003-04-01 |
| 6525971 | Distributed write data drivers for burst access memories | Todd A. Merritt | 2003-02-25 |
| 6522163 | Apparatus and method for coupling a first node to a second node using switches which are selectively clocked for fast switching times | — | 2003-02-18 |
| 6519689 | Method and system for processing pipelined memory commands | — | 2003-02-11 |
| 6519719 | Method and apparatus for transferring test data from a memory array | — | 2003-02-11 |
| 6519675 | Two step memory device command buffer apparatus and method and memory devices and computer systems using same | — | 2003-02-11 |
| 6516382 | Memory device balanced switching circuit and method of controlling an array of transfer gates for fast switching times | — | 2003-02-04 |
| 6515914 | Memory device and method having data path with multiple prefetch I/O configurations | Brent Keeth, Brian Johnson | 2003-02-04 |
| 6500682 | Method for configuring a redundant bond pad for probing a semiconductor | — | 2002-12-31 |
| 6496420 | Methods and apparatus for reading memory device register data | — | 2002-12-17 |