Issued Patents All Time
Showing 25 most recent of 139 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11953747 | Pre-termination module box and optical fiber distribution box using same | — | 2024-04-09 |
| 11887969 | Signal delivery in stacked device | Brent Keeth, Mark Hiatt, Mark E. Tuttle, Rahul Advani, John F. Schreck | 2024-01-30 |
| 11264360 | Signal delivery in stacked device | Brent Keeth, Mark Hiatt, Mark E. Tuttle, Rahul Advani, John F. Schreck | 2022-03-01 |
| 10468382 | Signal delivery in stacked device | Brent Keeth, Mark Hiatt, Mark E. Tuttle, Rahul Advani, John F. Schreck | 2019-11-05 |
| 10247355 | Telescopic pole mounting system | — | 2019-04-02 |
| 9324690 | Signal delivery in stacked device | Brent Keeth, Mark Hiatt, Mark E. Tuttle, Rahul Advani, John F. Schreck | 2016-04-26 |
| 9019779 | Apparatus and methods for a physical layout of simultaneously sub-accessible memory modules | Joseph M. Jeddeloh | 2015-04-28 |
| 8892974 | Dynamic synchronization of data capture on an optical or other high speed communications link | Joseph M. Jeddeloh | 2014-11-18 |
| 8732383 | Reconfigurable memory module and method | Joseph M. Jeddeloh | 2014-05-20 |
| 8687446 | Semiconductor device with self refresh test mode | — | 2014-04-01 |
| 8553470 | Apparatus and methods for a physical layout of simultaneously sub-accessible memory modules | Joseph M. Jeddeloh | 2013-10-08 |
| 8539126 | Capacitive multidrop bus compensation | Roy Greeff | 2013-09-17 |
| 8364856 | Memory module with configurable input/output ports | David K. Ovard, Roy Greeff, Robert N. Leibowitz, Victor Y. Tsai | 2013-01-29 |
| 8295071 | Apparatus and methods for optically-coupled memory systems | Kevin J. Ryan | 2012-10-23 |
| 8234479 | System for controlling memory accesses to memory modules having a memory hub architecture | Joseph M. Jeddeloh | 2012-07-31 |
| 8200884 | Reconfigurable memory module and method | Joseph M. Jeddeloh | 2012-06-12 |
| 8181092 | Dynamic synchronization of data capture on an optical or other high speed communications link | Joseph M. Jeddeloh | 2012-05-15 |
| 8171181 | Memory module with configurable input/output ports | David K. Ovard, Roy Greeff, Robert N. Leibowitz, Victor Y. Tsai | 2012-05-01 |
| 8127081 | Memory hub and access method having internal prefetch buffers | Joseph M. Jeddeloh | 2012-02-28 |
| 8106520 | Signal delivery in stacked device | Brent Keeth, Mark Hiatt, Mark E. Tuttle, Rahul Advani, John F. Schreck | 2012-01-31 |
| 8086815 | System for controlling memory accesses to memory modules having a memory hub architecture | Joseph M. Jeddeloh | 2011-12-27 |
| 8040711 | Apparatus and methods for optically-coupled memory systems | Kevin J. Ryan | 2011-10-18 |
| 8035974 | Integrated circuit package support system | David J. Corisis, Walter L. Moden | 2011-10-11 |
| 7966444 | Reconfigurable memory module and method | Joseph M. Jeddeloh | 2011-06-21 |
| 7913005 | Capacitive multidrop bus compensation | Roy Greeff | 2011-03-22 |