Issued Patents All Time
Showing 26–50 of 178 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7103742 | Burst/pipelined edo memory device | Jeffrey S. Mailloux, Kevin J. Ryan, Brett Williams | 2006-09-05 |
| 7099174 | Metal wiring pattern for memory devices | J. Wayne Thompson | 2006-08-29 |
| 7095660 | Sending signal through integrated circuit during setup time | Donald M. Morgan | 2006-08-22 |
| 7088625 | Distributed write data drivers for burst access memories | Troy A. Manning | 2006-08-08 |
| 7075857 | Distributed write data drivers for burst access memories | Troy A. Manning | 2006-07-11 |
| 7043672 | Layout for a semiconductor memory device having redundant elements | — | 2006-05-09 |
| 7006394 | Apparatus and method for semiconductor device repair with reduced number of programmable elements | Timothy B. Cowles | 2006-02-28 |
| 7006393 | Method and apparatus for semiconductor device repair with reduced number of programmable elements | Timothy B. Cowles, Vikram Bollu | 2006-02-28 |
| 6982921 | Multiple configuration multiple chip memory device and method | Donald M. Morgan | 2006-01-03 |
| 6980478 | Zero-enabled fuse-set | Frank Alejano, Brian J. Ladner, Timothy B. Cowles, Danial S. Dean, Paul M. Prew | 2005-12-27 |
| 6950898 | Data amplifier having reduced data lines and/or higher data rates | Donald M. Morgan | 2005-09-27 |
| 6914830 | Distributed write data drivers for burst access memories | Troy A. Manning | 2005-07-05 |
| 6909196 | Method and structures for reduced parasitic capacitance in integrated circuit metallizations | Shubneesh Batra, Michael Chaine, Brent Keeth, Salman Akram, Troy A. Manning +3 more | 2005-06-21 |
| 6882590 | Multiple configuration multiple chip memory device and method | Donald M. Morgan | 2005-04-19 |
| 6833752 | High output high efficiency low voltage charge pump | Shubneesh Batra | 2004-12-21 |
| 6801076 | High output high efficiency low voltage charge pump | — | 2004-10-05 |
| 6750695 | Voltage pump and a level translator circuit | Greg A. Blodgett | 2004-06-15 |
| 6735729 | Compression circuit for testing a memory device | Nicholas VanHeel | 2004-05-11 |
| 6728142 | Distributed write data drivers for burst access memories | Troy A. Manning | 2004-04-27 |
| 6704828 | System and method for implementing data pre-fetch having reduced data lines and/or higher data rates | Donald M. Morgan | 2004-03-09 |
| 6693844 | Sending signal through integrated circuit during setup time | Donald M. Morgan | 2004-02-17 |
| 6664634 | Metal wiring pattern for memory devices | J. Wayne Thompson | 2003-12-16 |
| 6654306 | Apparatus and method for generating an oscillating signal | Hal Butler | 2003-11-25 |
| 6615325 | Method for switching between modes of operation | Jeffrey S. Mailloux, Kevin J. Ryan, Brett Williams | 2003-09-02 |
| 6587978 | Circuit and method for varying a pulse width of an internal control signal during a test mode | George B. Raad, Stephen L. Casper | 2003-07-01 |