Issued Patents All Time
Showing 25 most recent of 185 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12406712 | Sensing scheme for a memory with shared sense components | Yuan He, Tae H. Kim | 2025-09-02 |
| 12314549 | Computer-readable media and methods for generating a geospatial image map | Patrick J. Mullarkey | 2025-05-27 |
| 12158826 | Storing memory array operational information in non-volatile subarrays | Christopher John Kawamura, Charles L. Ingalls | 2024-12-03 |
| 12114474 | Integrated memory comprising secondary access devices between digit lines and primary access devices | Charles L. Ingalls | 2024-10-08 |
| 12022663 | Integrated components which have both horizontally-oriented transistors and vertically-oriented transistors | Charles L. Ingalls | 2024-06-25 |
| 11915735 | Sensing scheme for a memory with shared sense components | Yuan He, Tae H. Kim | 2024-02-27 |
| 11901005 | Apparatuses and methods for memory including ferroelectric memory cells and dielectric memory cells | Michael A. Shore | 2024-02-13 |
| 11705186 | Storage and offset memory cells | — | 2023-07-18 |
| 11636890 | Array data bit inversion | Charles L. Ingalls | 2023-04-25 |
| 11574668 | Apparatuses and methods including ferroelectric memory and for operating ferroelectric memory | Christopher John Kawamura | 2023-02-07 |
| 11501815 | Sensing scheme for a memory with shared sense components | Yuan He, Tae H. Kim | 2022-11-15 |
| 11475934 | Ferroelectric memory cell sensing | Christopher John Kawamura | 2022-10-18 |
| 11450740 | Integrated memory comprising gated regions between charge-storage devices and access devices | Charles L. Ingalls | 2022-09-20 |
| 11450668 | Integrated memory comprising secondary access devices between digit lines and primary access devices | Charles L. Ingalls | 2022-09-20 |
| 11437381 | Integrated assemblies having voltage sources coupled to shields and/or plate electrodes through capacitors | Jiyun Li | 2022-09-06 |
| 11392468 | Storing memory array operational information in non-volatile subarrays | Christopher John Kawamura, Charles L. Ingalls | 2022-07-19 |
| 11380388 | Memory arrays with vertical thin film transistors coupled between digit lines | Charles L. Ingalls | 2022-07-05 |
| 11264394 | Integrated components which have both horizontally-oriented transistors and vertically-oriented transistors | Charles L. Ingalls | 2022-03-01 |
| 11250900 | Half density ferroelectric memory and operation | Charles L. Ingalls | 2022-02-15 |
| 11238913 | Cell-based reference voltage generation | Christopher John Kawamura | 2022-02-01 |
| 11232828 | Integrated memory assemblies comprising multiple memory array decks | Charles L. Ingalls | 2022-01-25 |
| 11227861 | Integrated assemblies comprising sense-amplifier-circuitry and wordline-driver-circuitry under memory cells of a memory array | Hiroki Fujisawa, Charles L. Ingalls, Richard J. Hill, Gurtej S. Sandhu | 2022-01-18 |
| 11222975 | Memory arrays with vertical transistors and the formation thereof | Fatma Arzum Simsek-Ege, Steve V. Cole, Toby D. Robbs | 2022-01-11 |
| 11211113 | Integrated assemblies comprising wordlines having ends selectively shunted to low voltage for speed transitioning | Christopher John Kawamura | 2021-12-28 |
| 11205468 | Apparatuses and methods including ferroelectric memory and for operating ferroelectric memory | Christopher John Kawamura | 2021-12-21 |