Issued Patents All Time
Showing 25 most recent of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12347515 | Circuit for tracking access occurrences | Yuan He | 2025-07-01 |
| 12183383 | Methods for row hammer mitigation and memory devices and systems employing the same | Timothy B. Cowles, Dean D. Gans, Nathaniel J. Meier, Randall J. Rooney | 2024-12-31 |
| 12159682 | Multi-level cells, and related arrays, devices, systems, and methods | Yuan He | 2024-12-03 |
| 12080336 | Apparatuses and methods for compensated sense amplifier with cross coupled N-type transistors | Christopher John Kawamura, Tae H. Kim | 2024-09-03 |
| 12051460 | Apparatuses and methods for single-ended sense amplifiers | Tae H. Kim, Christopher John Kawamura | 2024-07-30 |
| 12010831 | 3D DRAM with multiple memory tiers and vertically extending digit lines | Yuan He | 2024-06-11 |
| 11984148 | Apparatuses and methods for tracking victim rows | Daniel B. Penney, Jason M. Brown, Nathaniel J. Meier, Timothy B. Cowles | 2024-05-14 |
| 11810610 | Methods for row hammer mitigation and memory devices and systems employing the same | Timothy B. Cowles, Dean D. Gans, Nathaniel J. Meier, Randall J. Rooney | 2023-11-07 |
| 11798610 | Apparatuses and methods for controlling steal rates | Timothy B. Cowles, Beau D. Barry, Matthew D. Jenkinson, Nathaniel J. Meier, Michael A. Shore +2 more | 2023-10-24 |
| 11581035 | Systems, devices, and methods for efficient usage of IO section breaks in memory devices | Toby D. Robbs | 2023-02-14 |
| 11550654 | Apparatus with latch correction mechanism and methods for operating the same | Yuan He | 2023-01-10 |
| 11437381 | Integrated assemblies having voltage sources coupled to shields and/or plate electrodes through capacitors | Scott J. Derner | 2022-09-06 |
| 11423972 | Integrated assemblies | Yuan He | 2022-08-23 |
| 11347585 | Compression method for defect visibility in a memory device | Johnathan L. Gossi | 2022-05-31 |
| 11257535 | Apparatuses and methods for managing row access counts | Michael A. Shore | 2022-02-22 |
| 11200942 | Apparatuses and methods for lossy row access counting | Matthew D. Jenkinson, Dennis G. Montierth, Nathaniel J. Meier | 2021-12-14 |
| 11158364 | Apparatuses and methods for tracking victim rows | Daniel B. Penney, Jason M. Brown, Nathaniel J. Meier, Timothy B. Cowles | 2021-10-26 |
| 11127436 | Memory array with access line control having a shunt sense line | — | 2021-09-21 |
| 11087819 | Methods for row hammer mitigation and memory devices and systems employing the same | Timothy B. Cowles, Dean D. Gans, Nathaniel J. Meier, Randall J. Rooney | 2021-08-10 |
| 11074964 | Integrated assemblies comprising digit lines configured to have shunted ends during a precharge operation | Christopher John Kawamura | 2021-07-27 |
| 11069393 | Apparatuses and methods for controlling steal rates | Timothy B. Cowles, Beau D. Barry, Matthew D. Jenkinson, Nathaniel J. Meier, Michael A. Shore +2 more | 2021-07-20 |
| 11069385 | Integrated assemblies comprising folded-digit-line-configurations | Scott J. Derner | 2021-07-20 |
| 11043500 | Integrated assemblies comprising twisted digit line configurations | — | 2021-06-22 |
| 10937517 | Apparatuses and methods to encode column plane compression data | Eric J. Rich-Plotkin, Christopher G. Wieduwilt, Boon Hor Lam, Greg S. Hendrix, Shawn M. Hilde +1 more | 2021-03-02 |
| 10896722 | Integrated assemblies having sense-amplifier-circuitry distributed amongst two or more locations, and having circuitry configured to isolate local column-select-structures from a global structure | Charles L. Ingalls | 2021-01-19 |