Issued Patents All Time
Showing 25 most recent of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12430205 | Methods for error count reporting with scaled error count information, and memory devices employing the same | Matthew A. Prather | 2025-09-30 |
| 12300349 | Memory module multiple port buffer techniques | Jasper S. Gibbons, Matthew A. Prather, Brent Keeth, Frank F. Ross, Daniel B. Stewart | 2025-05-13 |
| 12197766 | Error injection methods using soft post-package repair (sPPR) techniques and memory devices and memory systems employing the same | Matthew A. Prather, Neal J. Koyle | 2025-01-14 |
| 12183383 | Methods for row hammer mitigation and memory devices and systems employing the same | Timothy B. Cowles, Dean D. Gans, Jiyun Li, Nathaniel J. Meier | 2024-12-31 |
| 12061795 | Repair element availability communication | Loren Jeffrey Wooley, Yoshinori Fujiwara | 2024-08-13 |
| 12056008 | Error check and scrub for semiconductor memory device | Matthew A. Prather | 2024-08-06 |
| 12003252 | Error correcting code poisoning for memory devices and associated methods and systems | Joshua E. Alzheimer | 2024-06-04 |
| 11996135 | Memory devices and systems configured to communicate a delay signal and methods for operating the same | Sujeet Ayyapureddi | 2024-05-28 |
| 11977444 | Methods for error count reporting with scaled error count information, and memory devices employing the same | Matthew A. Prather | 2024-05-07 |
| 11915775 | Apparatuses and methods for bad row mode | Jack Riley, Scott E. Smith, Christian Mohr, Gary L. Howe, Joshua E. Alzheimer +2 more | 2024-02-27 |
| 11854655 | Methods for providing device status in response to read commands directed to write-only mode register bits and memory devices and systems employing the same | Matthew A. Prather | 2023-12-26 |
| 11810610 | Methods for row hammer mitigation and memory devices and systems employing the same | Timothy B. Cowles, Dean D. Gans, Jiyun Li, Nathaniel J. Meier | 2023-11-07 |
| 11790974 | Apparatuses and methods for refresh compliance | Markus H. Geiger | 2023-10-17 |
| 11775459 | Methods for performing multiple memory operations in response to a single command and memory devices and systems employing the same | Matthew A. Prather, Frank F. Ross | 2023-10-03 |
| 11721406 | Generating test data for a memory system design based on operation of a test system, and related methods, devices, and systems | Won Ho Choi | 2023-08-08 |
| 11698831 | Methods for error count reporting with scaled error count information, and memory devices employing the same | Matthew A. Prather | 2023-07-11 |
| 11687410 | Error check and scrub for semiconductor memory device | Matthew A. Prather | 2023-06-27 |
| 11664084 | Memory device on-die ECC data | Anthony D. Veches, Debra M. Bell | 2023-05-30 |
| 11604694 | Error correction in row hammer mitigation and target row refresh | Matthew A. Prather | 2023-03-14 |
| 11594298 | Word line characteristics monitors for memory devices and associated methods and systems | Matthew A. Prather | 2023-02-28 |
| 11538508 | Memory module multiple port buffer techniques | Jasper S. Gibbons, Matthew A. Prather, Brent Keeth, Frank F. Ross, Daniel B. Stewart | 2022-12-27 |
| 11533064 | Error correcting code poisoning for memory devices and associated methods and systems | Joshua E. Alzheimer | 2022-12-20 |
| 11417387 | Reserved rows for row-copy operations for semiconductor memory devices and associated methods and systems | — | 2022-08-16 |
| 11342039 | Word line characteristics monitors for memory devices and associated methods and systems | Matthew A. Prather | 2022-05-24 |
| 11294836 | Methods for performing multiple memory operations in response to a single command and memory devices and systems employing the same | Matthew A. Prather, Frank F. Ross | 2022-04-05 |