Issued Patents All Time
Showing 51–75 of 185 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10854617 | Integrated components which have both horizontally-oriented transistors and vertically-oriented transistors | Charles L. Ingalls | 2020-12-01 |
| 10854276 | Apparatuses and methods including two transistor-one capacitor memory and for accessing same | Christopher John Kawamura | 2020-12-01 |
| 10825501 | Pre-writing memory cells of an array | Christopher John Kawamura | 2020-11-03 |
| 10811083 | Integrated assemblies comprising supplemental sense-amplifier-circuitry for refresh | Charles L. Ingalls | 2020-10-20 |
| 10796743 | Dynamic adjustment of memory cell digit line capacitance | Christopher John Kawamura, Charles L. Ingalls | 2020-10-06 |
| 10783949 | Half density ferroelectric memory and operation | Charles L. Ingalls | 2020-09-22 |
| 10748596 | Array data bit inversion | Charles L. Ingalls | 2020-08-18 |
| 10726907 | Electronic device with a sense amp mechanism | Charles L. Ingalls | 2020-07-28 |
| 10706907 | Cell-specific referenece generation and sensing | Christopher John Kawamura | 2020-07-07 |
| 10658024 | Systems and methods for dynamic random access memory (DRAM) cell voltage boosting | Tae H. Kim, Charles L. Ingalls | 2020-05-19 |
| 10622057 | Tri-level DRAM sense amplifer | Christopher John Kawamura, Charles L. Ingalls | 2020-04-14 |
| 10614874 | Integrated memory assemblies comprising multiple memory array decks | Charles L. Ingalls | 2020-04-07 |
| 10607994 | Vertical 2T-2C memory cells and memory arrays | Michael A. Shore | 2020-03-31 |
| 10607677 | Cell-based reference voltage generation | Christopher John Kawamura | 2020-03-31 |
| 10600472 | Systems and methods for memory cell array initialization | Huy T. Vo, Patrick J. Mullarkey, Jeffrey P. Wright, Michael A. Shore | 2020-03-24 |
| 10580464 | Sense amplifier constructions | Charles L. Ingalls | 2020-03-03 |
| 10559339 | Periphery fill and localized capacitance | Christopher John Kawamura | 2020-02-11 |
| 10535399 | Memory arrays | Christopher John Kawamura | 2020-01-14 |
| 10535397 | Sensing techniques for multi-level cells | Christopher John Kawamura | 2020-01-14 |
| 10529402 | Ferroelectric memory cell sensing | Christopher John Kawamura | 2020-01-07 |
| 10510394 | Reprogrammable non-volatile ferroelectric latch for use with a memory controller | Christopher John Kawamura, Charles L. Ingalls | 2019-12-17 |
| 10468421 | Memory cells and memory arrays | Debra M. Bell | 2019-11-05 |
| 10431282 | Array data bit inversion | Charles L. Ingalls | 2019-10-01 |
| 10431283 | Apparatuses and methods including ferroelectric memory and for accessing ferroelectric memory | Christopher John Kawamura | 2019-10-01 |
| 10431284 | Dynamic reference voltage determination | Christopher John Kawamura, Charles L. Ingalls | 2019-10-01 |