Issued Patents All Time
Showing 26–50 of 86 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6590407 | Apparatus for disabling and re-enabling access to IC test functions | Daryl L. Habersetzer, Casey Kurth, Jason Graalum | 2003-07-08 |
| 6570400 | Method for disabling and re-enabling access to IC test functions | Daryl L. Habersetzer, Casey Kurth, Jason Graalum | 2003-05-27 |
| 6556497 | Refresh controller and address remapping circuit and method for dual mode full/reduced density DRAMs | Timothy B. Cowles, Michael A. Shore | 2003-04-29 |
| 6519201 | Refresh controller and address remapping circuit and method for dual mode full/reduced density DRAMs | Timoty B. Cowles, Michael A. Shore | 2003-02-11 |
| 6499111 | Apparatus for adjusting delay of a clock signal relative to a data signal | — | 2002-12-24 |
| 6459635 | Apparatus and method for increasing test flexibility of a memory device | Michael A. Shore | 2002-10-01 |
| 6452842 | Device and method for supplying current to a semiconductor memory to support a boosted voltage within the memory during testing | — | 2002-09-17 |
| 6449203 | Refresh controller and address remapping circuit and method for dual mode full/reduced density DRAMs | Timoty B. Cowles, Michael A. Shore | 2002-09-10 |
| 6445605 | Circuit for programming antifuse bits | Casey Kurth, Jason Graalum, Daryl L. Habersetzer | 2002-09-03 |
| 6434072 | Row decoded biasing of sense amplifier for improved one's margin | Scott J. Derner | 2002-08-13 |
| 6410385 | ROM-embedded-DRAM | Casey Kurth, Scott J. Derner | 2002-06-25 |
| 6385691 | Memory device with command buffer that allows internal command buffer jumps | Casey Kurth, Scott J. Derner | 2002-05-07 |
| 6384655 | Comparator for determining process variations | — | 2002-05-07 |
| 6378079 | Computer system having memory device with adjustable data clocking | — | 2002-04-23 |
| 6373761 | Method and apparatus for multiple row activation in memory devices | Michael A. Shore | 2002-04-16 |
| 6365421 | Method and apparatus for storage of test results within an integrated circuit | Brett Debenham, Kim Pierce, Douglas J. Cutter, Kurt D. Beigel, Fan Ho +6 more | 2002-04-02 |
| 6359823 | Circuit and method for refreshing data stored in a memory cell | — | 2002-03-19 |
| 6356491 | Method and circuit for rapidly equilibrating paired digit lines of a memory device during testing | Casey Kurth | 2002-03-12 |
| 6351141 | Method and apparatus for limited reprogrammability of fuse options using one-time programmable elements | — | 2002-02-26 |
| 6327196 | Synchronous memory device having an adjustable data clocking circuit | — | 2001-12-04 |
| 6301178 | Reduced cell voltage for memory device | Scott J. Derner | 2001-10-09 |
| 6292421 | Method and apparatus for multiple row activation in memory devices | Michael A. Shore | 2001-09-18 |
| 6285600 | Device and method for supplying current to a semiconductor memory to support a boosted voltage within the memory during testing | — | 2001-09-04 |
| 6275063 | Method and apparatus for limited reprogrammability of fuse options using one-time programmable elements | — | 2001-08-14 |
| 6275085 | Comparator for determining process variations | — | 2001-08-14 |