Issued Patents All Time
Showing 25 most recent of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12417804 | Low power management for sleep mode operation of a memory device | Shuai Xu, Michele Piccardi, Arvind Muralidharan, Qisong Lin, Scott Anthony Stoller +1 more | 2025-09-16 |
| 12406731 | Dynamic latches above a three-dimensional non-volatile memory array | Jiewei Chen, Mithun Kumar Ramasahayam, Tomoko Ogura Iwasaki, Luyen Vu | 2025-09-02 |
| 12387790 | Double single level cell program in a memory device | Tomoko Ogura Iwasaki, Eric N. Lee | 2025-08-12 |
| 12271592 | Independent plane architecture in a memory device | Andrea Giovanni Xotta, Dheeraj Srinivasan, Ali Mohammadzadeh, Karl D. Schuh, Guido Luciano Rizzo +7 more | 2025-04-08 |
| 12068240 | Capacitor in a three-dimensional memory structure | Xiaojiang Guo, Naveen Kaushik, Shuai Xu | 2024-08-20 |
| 12027227 | Low power management for sleep mode operation of a memory device | Shuai Xu, Michele Piccardi, Arvind Muralidharan, Qisong Lin, Scott Anthony Stoller +1 more | 2024-07-02 |
| 11869603 | Voltage regulation | Shuai Xu, Michele Piccardi | 2024-01-09 |
| 10861509 | Asynchronous/synchronous interface | Dean Nobunaga, Chih-Liang Chen | 2020-12-08 |
| 10460775 | Asynchronous/synchronous interface | Dean Nobunaga, Chih-Liang Chen | 2019-10-29 |
| 10198052 | Systems, methods and devices for limiting current consumption upon power-up | — | 2019-02-05 |
| 10083725 | Asynchronous/synchronous interface | Dean Nobunaga, Chih-Liang Chen | 2018-09-25 |
| 9959931 | Programming a memory device in response to its program history | Fred Jaffin, III | 2018-05-01 |
| 9754643 | Asynchronous/synchronous interface | Dean Nobunaga, Chih-Liang Chen | 2017-09-05 |
| 9613706 | Programming and/or erasing a memory device in response to its program and/or erase history | Fred Jaffin, III | 2017-04-04 |
| 9390049 | Logical unit address assignment | Terry M. Grunzke, Dean Nobunaga | 2016-07-12 |
| 9299441 | Programming and/or erasing a memory device in response to its program and/or erase history | Fred Jaffin, III | 2016-03-29 |
| 9190153 | Asynchronous/synchronous interface | Dean Nobunaga, Chih-Liang Chen | 2015-11-17 |
| 8917550 | Apparatus comparing verified data to original data in the programming of memory cells | — | 2014-12-23 |
| 8880920 | Systems, methods and devices for limiting current consumption by a different ramp rate upon power-up | — | 2014-11-04 |
| 8699272 | Programming and/or erasing a memory device in response to its program and/or erase history | Fred Jaffin, III | 2014-04-15 |
| 8593889 | Asynchronous/synchronous interface | Dean Nobunaga, Chih-Liang Chen | 2013-11-26 |
| 8499134 | Selective register reset | — | 2013-07-30 |
| 8248868 | Asynchronous/synchronous interface | Dean Nobunaga, Chih-Liang Chen | 2012-08-21 |
| 8199574 | Apparatus comparing verified data to original data in the programming of a memory array | — | 2012-06-12 |
| 8194450 | Methods and control circuitry for programming memory cells | — | 2012-06-05 |