Issued Patents All Time
Showing 51–75 of 79 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7646644 | Nonvolatile memory device with multiple references and corresponding control method | Efrem Bolandrina, Daniele Vimercati | 2010-01-12 |
| 7567107 | Reduction of the time for executing an externally commanded transfer of data in an integrated device | Daniele Vimercati, Stefan Frederik Schippers, Yuri Zambelli | 2009-07-28 |
| 7154803 | Redundancy scheme for a memory integrated circuit | Andrea Martinelli, Daniele Balluchi | 2006-12-26 |
| 7149844 | Non-volatile memory device | Oreste Bernardi, Marco Redaelli | 2006-12-12 |
| 7023738 | Full-swing wordline driving circuit | Daniele Vimercati, Stefan Frederik Schippers, Graziano Mirichigni | 2006-04-04 |
| 6483750 | Flash EEPROM with on-chip erase source voltage generator | Marco Dallabora, Luigi Bettini | 2002-11-19 |
| 6195291 | Flash EEPROM with on-chip erase source voltage generator | Marco Dallabora, Luigi Bettini | 2001-02-27 |
| 6195290 | Method of avoiding disturbance during the step of programming and erasing an electrically programmable, semiconductor non-volatile storage device | Marco Dallabora, Simone Bartoli, Marco Defendi | 2001-02-27 |
| 6055187 | Sensing circuitry for reading and verifying the contents of electrically programmable/erasable non-volatile memory cells | Marco Dallabora, Andrea Ghilardelli | 2000-04-25 |
| 6040734 | Supply voltages switch circuit | Luigi Bettini, Simone Bartoli | 2000-03-21 |
| 5999450 | Electrically erasable and programmable non-volatile memory device with testable redundancy circuits | Marco Dallabora, Marco Defendi | 1999-12-07 |
| 5999456 | Flash EEPROM with controlled discharge time of the word lines and source potentials after erase | Mauro Sali, Marcello Carrera | 1999-12-07 |
| 5920505 | Negative word line voltage regulation circuit for electrically erasable semiconductor memory devices | Mauro Sali, Marcello Carrera | 1999-07-06 |
| 5917753 | Sensing circuitry for reading and verifying the contents of electrically programmable/erasable non-volatile memory cells | Marco Dallabora, Andrea Ghilardelli | 1999-06-29 |
| 5886949 | Method and circuit for generating a synchronizing ATD signal | Marco Defendi, Luigi Bettini | 1999-03-23 |
| 5854764 | Sectorized electrically erasable and programmable non-volatile memory device with redundancy | Marco Dallabora, Fabio Tassan Caser | 1998-12-29 |
| 5822247 | Device for generating and regulating a gate voltage in a non-volatile memory | Fabio Tassan Caser, Simone Bartoli | 1998-10-13 |
| 5818763 | Erasing method for a non-volatile memory | Marco Defendi, Luigi Bettini | 1998-10-06 |
| 5784319 | Method for erasing an electrically programmable and erasable non-volatile memory cell | Roberto Bez, Daniele Cantarelli, Marco Dallabora | 1998-07-21 |
| 5724290 | Method and programming device for detecting an error in a memory | Mauro Sali, Marcello Cane | 1998-03-03 |
| 5721707 | Erase voltage control circuit for an electrically erasable non-volatile memory cell | Marco Dallabora, Marcello Cane | 1998-02-24 |
| 5719807 | Flash EEPROM with controlled discharge time of the word lines and source potentials after erase | Mauro Sali, Marcello Carrera | 1998-02-17 |
| 5659502 | Negative word line voltage regulation circuit for electrically erasable semiconductor memory devices | Mauro Sali, Marcello Carrera | 1997-08-19 |
| 5638327 | Flash-EEPROM memory array and method for biasing the same | Marco Dallabora, Mauro Sali, Fabio Tassan Caser | 1997-06-10 |
| RE35121 | Regulation of the output voltage of a voltage multiplier | Marco Olivo, Luigi Pascucci | 1995-12-12 |