Issued Patents All Time
Showing 25 most recent of 44 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11443820 | Memory device, memory address decoder, system, and related method for memory attack detection | Lorenzo Bedarida, Albert S. Weiner | 2022-09-13 |
| 9349480 | Erase techniques and circuits therefor for non-volatile memory devices | Vincenzo Ferragina, Stefano Surico, Giuseppe Moioli | 2016-05-24 |
| 8995192 | Method of programming selection transistors for NAND flash memory | Osama Khouri | 2015-03-31 |
| 8705283 | Erase techniques and circuits therefor for non-volatile memory devices | Vincenzo Ferragina, Stefano Surico, Giuseppe Moioli | 2014-04-22 |
| 8644079 | Method and circuit to discharge bit lines after an erase pulse | Marco Passerini, Osama Khouri | 2014-02-04 |
| 8599615 | Memory device in particular extra array configured therein for configuration and redundancy information | Mauro Pagliato, Diego Della Mina | 2013-12-03 |
| 7920436 | Sense amplifier | Lorenzo Bedarida, Davide Manfré, Alex Pojer | 2011-04-05 |
| 7782695 | Compensated current offset in a sensing circuit | Lorenzo Bedarida, Gabriele Pelli, Mauro Chinosi | 2010-08-24 |
| 7769943 | Flexible, low cost apparatus and method to introduce and check algorithm modifications in a non-volatile memory | Stefano Surico, Stefano Sivero, Marco Passerini | 2010-08-03 |
| 7684245 | Non-volatile memory array architecture with joined word lines | Steve Schumann, Massimiliano Frulio, Lorenzo Bedarida, Edward Hui | 2010-03-23 |
| 7561485 | Sense architecture | Gabriele Pelli, Lorenzo Bedarida, Giorgio Bosisio | 2009-07-14 |
| 7551498 | Implementation of column redundancy for a flash memory with a high write parallelism | Stefano Surico, Andrea Sacco, Maria Mostola | 2009-06-23 |
| 7522455 | Method and system for reducing soft-writing in a multi-level flash memory | Lorenzo Bedarida, Fabio Tassan Caser, Giorgio Oddone | 2009-04-21 |
| 7499334 | Method and apparatus for discharging a memory cell in a memory device after an erase operation | Lorenzo Bedarida, Giorgio Oddone, Davide Manfré | 2009-03-03 |
| 7414891 | Erase verify method for NAND-type flash memories | Stefano Sivero, Marco Passerini, Fabio Tassan Caser | 2008-08-19 |
| 7404049 | Method and system for managing address bits during buffered program operations in a memory device | Stefano Surico, Davide Manfré, Donato Ferrario | 2008-07-22 |
| 7379338 | Method and system for regulating a program voltage value during multilevel memory device programming | Massimiliano Frulio, Davide Manfré, Andrea Sacco | 2008-05-27 |
| 7345921 | Method and system for a programming approach for a nonvolatile electronic device | Stefano Surico, Fabio Tassan Caser, Monica Marziani | 2008-03-18 |
| 7333389 | Column decoding architecture for flash memories | Stefano Sivero, Fabio Tassan Caser, Riccardo Riva Reggiori | 2008-02-19 |
| 7302518 | Method and system for managing a suspend request in a flash memory | Stefano Surico, Monica Marziani, Luca Figini | 2007-11-27 |
| 7283396 | System and method for matching resistance in a non-volatile memory | Lorenzo Bedarida, Andrea Sacco, Giorgio Oddone | 2007-10-16 |
| 7249215 | System for configuring parameters for a flash memory | Stefano Surico, Mirella Marsella, Giorgio Bosisio | 2007-07-24 |
| 7184311 | Method and system for regulating a program voltage value during multilevel memory device programming | Massimiliano Frulio, Davide Manfré, Andrea Sacco | 2007-02-27 |
| 7181565 | Method and system for configuring parameters for flash memory | Stefano Surico, Mirella Marsella, Giorgio Bosisio | 2007-02-20 |
| 7177198 | Compensated method to implement a high voltage discharge phase after erase pulse in a flash memory device | Lorenzo Bedarida, Giorgio Oddone, Davide Manfré | 2007-02-13 |