Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6433583 | CMOS switch circuit for transferring high voltages, in particular for line decoding in nonvolatile memories, with reduced consumption during switching | Rino Micheloni, Giovanni Campardo, Atsushi Ohba | 2002-08-13 |
| 6356481 | Row decoder for a nonvolatile memory with capability of selectively biasing word lines to positive or negative voltages | Rino Micheloni, Giovanni Campardo, Atsushi Ohba | 2002-03-12 |
| 6285614 | Voltage regulator for single feed voltage memory circuits, and flash type memory in particular | Jacopo Mulatti, Stefano Zanardi, Maurizio Branchetti | 2001-09-04 |
| 6184670 | Memory cell voltage regulator with temperature correlated voltage generator circuit | Jacopo Mulatti, Matteo Zammattio, Andrea Ghilardelli | 2001-02-06 |
| 6101118 | Voltage regulator for single feed voltage memory circuits, and flash type memory in particular | Jacopo Mulatti, Stefano Zanardi, Maurizio Branchetti | 2000-08-08 |
| 5999456 | Flash EEPROM with controlled discharge time of the word lines and source potentials after erase | Mauro Sali, Corrado Villa | 1999-12-07 |
| 5920505 | Negative word line voltage regulation circuit for electrically erasable semiconductor memory devices | Mauro Sali, Corrado Villa | 1999-07-06 |
| 5784314 | Method for setting the threshold voltage of a reference memory cell | Mauro Sali, Marco Dallabora | 1998-07-21 |
| 5719807 | Flash EEPROM with controlled discharge time of the word lines and source potentials after erase | Mauro Sali, Corrado Villa | 1998-02-17 |
| 5659502 | Negative word line voltage regulation circuit for electrically erasable semiconductor memory devices | Mauro Sali, Corrado Villa | 1997-08-19 |
| 5559743 | Redundancy circuitry layout for a semiconductor memory device | Luigi Pascucci, Marco Defendi | 1996-09-24 |