Issued Patents All Time
Showing 26–34 of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9201116 | Method of generating test patterns for detecting small delay defects | Naman Gupta, Sagar Kataria, Pragya Shukla | 2015-12-01 |
| 9099442 | Conductive interconnect structures incorporating negative thermal expansion materials and associated systems, devices, and methods | Hongqi Li, Jin Lu, Shyam Ramalingam | 2015-08-04 |
| 9034752 | Methods of exposing conductive vias of semiconductor devices and associated structures | Hongqi Li, Irina Vasilyeva | 2015-05-19 |
| 8956974 | Devices, systems, and methods related to planarizing semiconductor devices after forming openings | Wayne H. Huang | 2015-02-17 |
| 8911558 | Post-tungsten CMP cleaning solution and method of using the same | Hongqi Li, Jin Lu | 2014-12-16 |
| 8872252 | Multi-tiered semiconductor apparatuses including residual silicide in semiconductor tier | Gowri Damarla, Roger W. Lindsay, Eric Blomiley | 2014-10-28 |
| 8871103 | Process of planarizing a wafer with a large step height and/or surface area features | Brett W. Busch, Gowri Damarla, Chia-Yen Ho, Thy Tran | 2014-10-28 |
| 8841952 | Data retention flip-flop | Nitin Singh, Amit Jindal | 2014-09-23 |
| 8580690 | Process of planarizing a wafer with a large step height and/or surface area features | Brett W. Busch, Gowri Damarla, Chia-Yen Ho, Thy Tran | 2013-11-12 |