Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11011420 | Conductive interconnect structures incorporating negative thermal expansion materials and associated systems, devices, and methods | Hongqi Li, Anurag Jindal, Jin Lu | 2021-05-18 |
| 10847442 | Interconnect assemblies with through-silicon vias and stress-relief features | Hongqi Li, Anurag Jindal, Jin Lu, Gowrisankar Damarla | 2020-11-24 |
| 10546777 | Conductive interconnect structures incorporating negative thermal expansion materials and associated systems, devices, and methods | Hongqi Li, Anurag Jindal, Jin Lu | 2020-01-28 |
| 10319678 | Capping poly channel pillars in stacked circuits | Hongqi Li, Gowrisankar Damarla, Roger W. Lindsay, Zailong Bian, Jin Lu +1 more | 2019-06-11 |
| 9922875 | Conductive interconnect structures incorporating negative thermal expansion materials and associated systems, devices, and methods | Hongqi Li, Anurag Jindal, Jin Lu | 2018-03-20 |
| 9911643 | Semiconductor constructions and methods of forming intersecting lines of material | Hongqi Li, Gowrisankar Damarla, Robert J. Hanson, Jin Lu | 2018-03-06 |
| 9754825 | Conductive interconnect structures incorporating negative thermal expansion materials and associated systems, devices, and methods | Hongqi Li, Anurag Jindal, Jin Lu | 2017-09-05 |
| 9577192 | Method for forming a metal cap in a semiconductor memory device | Muralikrishnan Balakrishnan, Zailong Bian, Gowrisankar Damarla, Hongqi Li, Jin Lu +1 more | 2017-02-21 |
| 9391001 | Semiconductor constructions | Hongqi Li, Gowrisankar Damarla, Robert J. Hanson, Jin Lu | 2016-07-12 |
| 9263459 | Capping poly channel pillars in stacked circuits | Hongqi Li, Gowrisankar Damarla, Roger W. Lindsay, Zailong Bian, Jin Lu +1 more | 2016-02-16 |
| 9099442 | Conductive interconnect structures incorporating negative thermal expansion materials and associated systems, devices, and methods | Hongqi Li, Anurag Jindal, Jin Lu | 2015-08-04 |