Issued Patents All Time
Showing 76–83 of 83 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6557129 | Method and apparatus for selectively compacting test responses | Janusz Rajski, Mark Kassab, Nilanjan Mukherjee | 2003-04-29 |
| 6543020 | Test pattern compression for an integrated circuit test environment | Janusz Rajski, Mark Kassab, Nilanjan Mukherjee | 2003-04-01 |
| 6539409 | Method for synthesizing linear finite state machines | Janusz Rajski, Mark Kassab, Nilanjan Mukherjee | 2003-03-25 |
| 6353842 | Method for synthesizing linear finite state machines | Janusz Rajski, Mark Kassab, Nilanjan Mukherjee | 2002-03-05 |
| 6327687 | Test pattern compression for an integrated circuit test environment | Janusz Rajski, Mark Kassab, Nilanjan Mukherjee | 2001-12-04 |
| 5991909 | Parallel decompressor and related methods and apparatuses | Janusz Rajski | 1999-11-23 |
| 5991898 | Arithmetic built-in self test of multiple scan-based integrated circuits | Janusz Rajski | 1999-11-23 |
| 5313469 | Self-testable digital integrator | Saman M. I. Adham, Janusz Rajski, Mark Kassab | 1994-05-17 |