Issued Patents All Time
Showing 126–150 of 175 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6661273 | Substrate pump circuit and method for I/O ESD protection | Chun-Hsiang Lai, Meng-Huang Liu, Shin Su | 2003-12-09 |
| 6657894 | Apparatus and method for programming virtual ground nonvolatile memory cell array without disturbing adjacent cells | Chih Chieh Yeh, Wen-Jer Tsai | 2003-12-02 |
| 6649971 | Nitride read-only memory cell for improving second-bit effect and method for making thereof | Yen-Hung Yeh, Wen-Jer Tsai, Mu-Yi Liu, Kwang-Yang Chan, Tso-Hung Fan | 2003-11-18 |
| 6646924 | Non-volatile memory and operating method thereof | Wen-Jer Tsai, Chih Chieh Yeh | 2003-11-11 |
| 6643176 | Reference current generation circuit for multiple bit flash memory | Tso-Hung Fan, Chih Chieh Yeh | 2003-11-04 |
| 6635946 | Semiconductor device with trench isolation structure | Han-Chao Lai, Hung-Sui Lin | 2003-10-21 |
| 6628488 | Electrostatic discharge protection circuit | Meng-Huang Liu, Chun-Hsiang Lai, Shin Su | 2003-09-30 |
| 6624737 | Voltage regulated circuit with well resistor divider | Yao-Wen Chang, Hui-Chih Lin | 2003-09-23 |
| 6620693 | Non-volatile memory and fabrication thereof | Han-Chao Lai, Hung-Sui Lin | 2003-09-16 |
| 6618230 | Electrostatic discharge cell of integrated circuit | Meng Huaug Liu, Chun-Hsiang Lai, Sing Su | 2003-09-09 |
| 6614694 | Erase scheme for non-volatile memory | Chih Chieh Yeh, Wen-Jer Tsai | 2003-09-02 |
| 6613595 | Test structure and method for flash memory tunnel oxide quality | Tso-Hung Fan | 2003-09-02 |
| 6607957 | Method for fabricating nitride read only memory | Tso-Hung Fan | 2003-08-19 |
| 6590261 | Electrostatic discharge protection structure | Shin Su, Chun-Hsiang Lai, Meng-Huang Liu | 2003-07-08 |
| 6590266 | 2-bit mask ROM device and fabrication method thereof | Mu-Yi Liu, Tso-Hung Fan, Kwang-Yang Chan, Yen-Hung Yeh | 2003-07-08 |
| 6587387 | Device and method for testing mask ROM for bitline to bitline isolation leakage | Tso-Hung Fan, Yen-Hung Yeh, Kwang-Yang Chan, Mu-Yi Liu | 2003-07-01 |
| 6555844 | Semiconductor device with minimal short-channel effects and low bit-line resistance | Hung-Sui Lin, Han-Chao Lai | 2003-04-29 |
| 6549029 | Circuit and method for measuring capacitance | Tsung-Hsuan Hsieh, Yao-Wen Chang | 2003-04-15 |
| 6531361 | Fabrication method for a memory device | Mu-Yi Liu, Kwang-Yang Chan, Yen-Hung Yeh, Tso-Hung Fan | 2003-03-11 |
| 6524919 | Method for manufacturing a metal oxide semiconductor with a sharp corner spacer | Han-Chao Lai, Hung-Sui Lin | 2003-02-25 |
| 6525361 | Process and integrated circuit for a multilevel memory cell with an asymmetric drain | Chung-Ju Chen, Hon Sui Lin, Mam-Tsung Wang, Chin-Hsi Lin, Ful-Long Ni | 2003-02-25 |
| 6524913 | Method of fabricating a non-volatile memory with a spacer | Hung-Sui Lin, Han-Chao Lai | 2003-02-25 |
| 6514807 | Method for fabricating semiconductor device applied system on chip | Yen-Hung Yeh, Tso-Hung Fan, Hung-Sui Lin, Shih-Keng Cho, Mu-Yi Liu +1 more | 2003-02-04 |
| 6512696 | Method of programming and erasing a SNNNS type non-volatile memory cell | Tso-Hung Fan, Samuel C. Pan, Ta-Hui Wang | 2003-01-28 |
| 6498377 | SONOS component having high dielectric property | Hung-Sui Lin, Nian-Kai Zous, Han-Chao Lai | 2002-12-24 |