Issued Patents All Time
Showing 101–125 of 175 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6834263 | NROM structure | Yao-Wen Chang, Wen-Jer Tsai | 2004-12-21 |
| 6834013 | Method for programming and erasing non-volatile memory with nitride tunneling layer | Tso-Hung Fan, Yen-Hung Yeh, Kwang-Yang Chan, Mu-Yi Liu | 2004-12-21 |
| 6829175 | Erasing method for non-volatile memory | Wen-Jer Tsai, Chih Chieh Yeh, Samuel C. Pan | 2004-12-07 |
| 6829125 | ESD protection circuit for multi-power and mixed-voltage integrated circuit | Meng-Huang Liu, Chun-Hsiang Lai, Sing Su | 2004-12-07 |
| 6829174 | Method of narrowing threshold voltage distribution | Yao-Wen Chang | 2004-12-07 |
| 6822910 | Non-volatile memory and operating method thereof | Wen-Jer Tsai, Chih Chieh Yeh | 2004-11-23 |
| 6812099 | Method for fabricating non-volatile memory having P-type floating gate | Hung-Sui Lin, Nian-Kai Zous, Kent Kuohua Chang | 2004-11-02 |
| 6808995 | Semiconductor device with minimal short-channel effects and low bit-line resistance | Hung-Sui Lin, Han-Chao Lai | 2004-10-26 |
| 6809915 | Gate-equivalent-potential circuit and method for I/O ESD protection | Chun-Hsiang Lai, Meng-Huang Liu, Shin Su | 2004-10-26 |
| 6801453 | Method and apparatus of a read scheme for non-volatile memory | Chih Chieh Yeh, Wen-Jer Tsai | 2004-10-05 |
| 6791146 | Silicon controlled rectifier structure with guard ring controlled circuit | Chen-Shang Lai, Meng-Huang Liu, Shin Su | 2004-09-14 |
| 6790730 | Fabrication method for mask read only memory device | Tso-Hung Fan, Yen-Hung Yeh, Kwang-Yang Chan, Mu-Yi Liu | 2004-09-14 |
| 6785163 | Trim circuit and method for tuning a current level of a reference cell in a flash memory | Chih Chieh Yeh, Tso-Hung Fan | 2004-08-31 |
| 6756638 | MOSFET structure with reduced junction capacitance | Yao-Wen Chang | 2004-06-29 |
| 6724677 | ESD device used with high-voltage input pad | Shin Su, Meng-Huang Liu, Chun-Hsiang Lai | 2004-04-20 |
| 6720614 | Operation method for programming and erasing a data in a P-channel sonos memory cell | Hung-Sui Lin, Nian-Kai Zous, Han-Chao Lai | 2004-04-13 |
| 6721204 | Memory erase method and device with optimal data retention for nonvolatile memory | Chih Chieh Yeh, Wen-Jer Tsai | 2004-04-13 |
| 6713821 | Structure of a mask ROM device | Tso-Hung Fan, Mu-Yi Liu, Kwang-Yang Chan, Yen-Hung Yeh | 2004-03-30 |
| 6709921 | Fabrication method for a flash memory device with a split floating gate and a structure thereof | Yen-Hung Yeh, Tso-Hung Fan, Wen-Jer Tsai, Mu-Yi Liu, Kwang-Yang Chan | 2004-03-23 |
| 6706575 | Method for fabricating a non-volatile memory | Tso-Hung Fan, Yen-Hung Yeh, Kwang-Yang Chan, Mu-Yi Liu | 2004-03-16 |
| 6690601 | Nonvolatile semiconductor memory cell with electron-trapping erase state and methods for operating the same | Chih Chieh Yeh, Wen-Jer Tsai | 2004-02-10 |
| 6687160 | Reference current generation circuit for multiple bit flash memory | Tso-Hung Fan, Chih Chieh Yeh | 2004-02-03 |
| 6683352 | Semiconductor device structure | Tsung-Hsuan Hsieh, Yao-Wen Chang | 2004-01-27 |
| 6671209 | Erasing method for p-channel NROM | Hung-Sui Lin, Han-Chao Lai | 2003-12-30 |
| 6665212 | Reference current generating circuit of multiple bit flash memory | Tso-Hung Fan, Chih Chieh Yeh | 2003-12-16 |