Issued Patents All Time
Showing 1–25 of 30 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7969699 | ESD protection trigger circuit | Kuo-Ji Chen | 2011-06-28 |
| 7173849 | Method of programming and erasing multi-level flash memory | Chih Chieh Yeh, Tao-Cheng Lu | 2007-02-06 |
| 7002849 | Method for programming and erasing non-volatile memory with nitride tunneling layer | Yen-Hung Yeh, Kwang-Yang Chan, Mu-Yi Liu, Tao-Cheng Lu | 2006-02-21 |
| 6958934 | Method of programming and erasing multi-level flash memory | Chih Chieh Yeh, Tao-Cheng Lu | 2005-10-25 |
| 6919607 | Structure of two-bit mask read-only memory device and fabricating method thereof | Mu-Yi Liu, Kwang-Yang Chan, Yen-Hung Yeh, Tao-Cheng Lu | 2005-07-19 |
| 6917073 | ONO flash memory array for improving a disturbance between adjacent memory cells | Mu-Yi Liu, Chih Chieh Yeh, Tao-Cheng Lu | 2005-07-12 |
| 6838691 | Chalcogenide memory and method of manufacturing the same | Mu-Yi Liu, Kwang-Yang Chan, Yen-Hung Yeh, Tao-Cheng Lu | 2005-01-04 |
| 6834013 | Method for programming and erasing non-volatile memory with nitride tunneling layer | Yen-Hung Yeh, Kwang-Yang Chan, Mu-Yi Liu, Tao-Cheng Lu | 2004-12-21 |
| 6790730 | Fabrication method for mask read only memory device | Yen-Hung Yeh, Kwang-Yang Chan, Mu-Yi Liu, Tao-Cheng Lu | 2004-09-14 |
| 6785163 | Trim circuit and method for tuning a current level of a reference cell in a flash memory | Chih Chieh Yeh, Tao-Cheng Lu | 2004-08-31 |
| 6713821 | Structure of a mask ROM device | Mu-Yi Liu, Kwang-Yang Chan, Yen-Hung Yeh, Tao-Cheng Lu | 2004-03-30 |
| 6709921 | Fabrication method for a flash memory device with a split floating gate and a structure thereof | Yen-Hung Yeh, Wen-Jer Tsai, Mu-Yi Liu, Kwang-Yang Chan, Tao-Cheng Lu | 2004-03-23 |
| 6706575 | Method for fabricating a non-volatile memory | Yen-Hung Yeh, Kwang-Yang Chan, Mu-Yi Liu, Tao-Cheng Lu | 2004-03-16 |
| 6687160 | Reference current generation circuit for multiple bit flash memory | Chih Chieh Yeh, Tao-Cheng Lu | 2004-02-03 |
| 6665212 | Reference current generating circuit of multiple bit flash memory | Chih Chieh Yeh, Tao-Cheng Lu | 2003-12-16 |
| 6649971 | Nitride read-only memory cell for improving second-bit effect and method for making thereof | Yen-Hung Yeh, Wen-Jer Tsai, Mu-Yi Liu, Kwang-Yang Chan, Tao-Cheng Lu | 2003-11-18 |
| 6643176 | Reference current generation circuit for multiple bit flash memory | Chih Chieh Yeh, Tao-Cheng Lu | 2003-11-04 |
| 6613595 | Test structure and method for flash memory tunnel oxide quality | Tao-Cheng Lu | 2003-09-02 |
| 6607957 | Method for fabricating nitride read only memory | Tao-Cheng Lu | 2003-08-19 |
| 6590266 | 2-bit mask ROM device and fabrication method thereof | Mu-Yi Liu, Kwang-Yang Chan, Yen-Hung Yeh, Tao-Cheng Lu | 2003-07-08 |
| 6587387 | Device and method for testing mask ROM for bitline to bitline isolation leakage | Yen-Hung Yeh, Kwang-Yang Chan, Mu-Yi Liu, Tao-Cheng Lu | 2003-07-01 |
| 6531361 | Fabrication method for a memory device | Mu-Yi Liu, Kwang-Yang Chan, Yen-Hung Yeh, Tao-Cheng Lu | 2003-03-11 |
| 6514807 | Method for fabricating semiconductor device applied system on chip | Yen-Hung Yeh, Hung-Sui Lin, Shih-Keng Cho, Mu-Yi Liu, Kwang-Yang Chan +1 more | 2003-02-04 |
| 6512696 | Method of programming and erasing a SNNNS type non-volatile memory cell | Tao-Cheng Lu, Samuel C. Pan, Ta-Hui Wang | 2003-01-28 |
| 6482706 | Method to scale down device dimension using spacer to confine buried drain implant | Yen-Hung Yeh, Mu-Yi Liu, Kwang-Yang Chan, Tao-Cheng Lu | 2002-11-19 |