Issued Patents All Time
Showing 51–75 of 175 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8411506 | Non-volatile memory and operating method of memory cell | Guan-Wei Wu, I-Chen Yang, Yao-Wen Chang | 2013-04-02 |
| 8345396 | Electrostatic discharge protectors having increased RC delays | Shih-Yu Wang, Chia-Ling Lu, Yu-Lien Liu, Yan-Yu Chen, Che-Shih Lin | 2013-01-01 |
| 8338880 | Flash memory | Guan-Wei Wu, I-Chen Yang, Yao-Wen Chang | 2012-12-25 |
| 8259492 | Method of reading dual-bit memory cell | Yao-Wen Chang | 2012-09-04 |
| 8253165 | Structures for lowering trigger voltage in an electrostatic discharge protection device | Shih-Yu Wang, Chia-Ling Lu, Yan-Yu Chen, Yu-Lien Liu | 2012-08-28 |
| 8203879 | Non-volatile memory and operation method thereof | Yao-Wen Chang | 2012-06-19 |
| 8164112 | Electostatic discharge protection circuit coupled on I/O pad | Chun-Hsiang Lai, Meng-Huang Liu | 2012-04-24 |
| 8098522 | Non-volatile memory and operation method thereof | Yao-Wen Chang, Guan-Wei Wu | 2012-01-17 |
| 8093665 | Semiconductor device and method for fabricating the same | I-Chen Yang, Guan-Wei Wu, Yao-Wen Chang | 2012-01-10 |
| 8072803 | Memory device and methods for fabricating and operating the same | I-Chen Yang, Guan-Wei Wu, PO-CHOU CHEN, Yao-Wen Chang | 2011-12-06 |
| 8014203 | Memory device and methods for fabricating and operating the same | I-Chen Yang, Yao-Wen Chang, Guan-Wei Wu, Tao Lin, PO-CHOU CHEN | 2011-09-06 |
| 8004890 | Operation method of non-volatile memory | Yao-Wen Chang, I-Chen Yang, Hsing-Wen Chang | 2011-08-23 |
| 7875938 | LDMOS device with multiple gate insulating members | Mu-Yi Liu, Chia-Lun Hsu, Ichen Yang, Kuan-Po Chen | 2011-01-25 |
| 7830707 | Method of reading dual-bit memory cell | Yao-Wen Chang | 2010-11-09 |
| 7799638 | Method for forming a memory array | I-Chen Yang, Yao-Wen Chang | 2010-09-21 |
| 7692968 | Operation method of non-volatile memory and method of improving coupling interference from nitride-based memory | Yao-Wen Chang, Guan-Wei Wu | 2010-04-06 |
| 7573102 | ESD protection structure and method utilizing substrate triggering for a high-voltage tolerant pad | Meng-Huang Liu, Chun-Hsiang Lai, Shin Su, Yen-Hung Yeh, Chia-Ling Lu | 2009-08-11 |
| 7529128 | Integrated code and data flash memory | Chih Chieh Yeh, Wen-Jer Tsai, Chih-Yuan Lu | 2009-05-05 |
| 7486086 | Method for measuring intrinsic capacitance of a metal oxide semiconductor (MOS) device | Yao-Wen Chang, Hsing-Wen Chang | 2009-02-03 |
| 7486568 | Method and apparatus for protection from over-erasing nonvolatile memory cells | Yi-Ying Liao, Chih Chieh Yeh, Wen-Jer Tsai | 2009-02-03 |
| 7473625 | LDMOS device and method of fabrication | Mu-Yi Liu, Chia-Lun Hsu, Ichen Yang, Kuan-Po Chen | 2009-01-06 |
| 7348625 | Semiconductor device and method of manufacturing the same | Mu-Yi Liu | 2008-03-25 |
| 7327611 | Method and apparatus for operating charge trapping nonvolatile memory | Chih Chieh Yeh, Wen-Jer Tsai | 2008-02-05 |
| 7307888 | Method and apparatus for operating nonvolatile memory in a parallel arrangement | Chih Chieh Yeh, Wen-Jer Tsai | 2007-12-11 |
| 7291870 | Electrostatic protection circuit | Chun-Hsiang Lai, Shin Su, Chia-Ling Lu, Yen-Hung Yeh | 2007-11-06 |