MW

Mam-Tsung Wang

MC Macronix International Co.: 27 patents #60 of 1,241Top 5%
HA Harvatek: 2 patents #28 of 61Top 50%
Overall (All Time): #117,728 of 4,157,543Top 3%
31
Patents All Time

Issued Patents All Time

Showing 1–25 of 31 patents

Patent #TitleCo-InventorsDate
11658257 Light source assembly, optical sensor assembly, and method of manufacturing a cell of the same Shyi-Ming Pan, Ping-Lung Wang 2023-05-23
11322542 Light-emitting diode (LED) assembly and method of manufacturing an LED cell of the same Shyi-Ming Pan, Ping-Lung Wang 2022-05-03
6614687 Current source component with process tracking characteristics for compact programmed Vt distribution of flash EPROM Ming-Shang Chen, Wenpin Lu, Baw-Chyuan Lin 2003-09-02
6525361 Process and integrated circuit for a multilevel memory cell with an asymmetric drain Tao-Cheng Lu, Chung-Ju Chen, Hon Sui Lin, Chin-Hsi Lin, Ful-Long Ni 2003-02-25
6455898 Electrostatic discharge input protection for reducing input resistance Meng-Hwang Liu, Tao-Cheng Lu 2002-09-24
6432782 8 bit per cell non-volatile semiconductor memory structure utilizing trench technology and dielectric floating gate Hsing Lan Lung, Tao-Cheng Lu 2002-08-13
6397377 Method of performing optical proximity corrections of a photo mask pattern by using a computer Bing Wang, Chun-Yi Yang, Chun-Jung Lin, Jui-Chin Chang 2002-05-28
6269017 Multi level mask ROM with single current path Tao-Cheng Lu, Chung-Ju Chen 2001-07-31
6259140 Silicide blocking process to form non-silicided regions on MOS devices Meng-Hwang Liu, Cheng-Shang Lai, Tao-Cheng Lu 2001-07-10
6215697 Multi-level memory cell device and method for self-converged programming Tao-Cheng Lu, Der-Shin Shyu, Shi-Xian Chen, Wen-Jer Tsai 2001-04-10
6204529 8 bit per cell non-volatile semiconductor memory structure utilizing trench technology and dielectric floating gate Hsing Lan Lung, Tao-Cheng Lu 2001-03-20
6181604 Method for fast programming of EPROMS and multi-level flash EPROMS Tao-Cheng Lu, Wen-Jer Tsai, Chin-Hsi Lin, Ful-Long Ni 2001-01-30
6175519 Virtual ground EPROM structure Tao-Cheng Lu, Chin-Hsi Lin, Ful-Long Ni 2001-01-16
6166955 Apparatus and method for programming of flash EPROM memory Wenpin Lu, Ming-Shang Chen, Baw-Chyuan Lin 2000-12-26
6166943 Method of forming a binary code of a ROM Ping-Ying Wang, Chun-Yi Yang, Chun-Jung Lin, Jui-Chin Chang 2000-12-26
6140682 Self protected stacked NMOS with non-silicided region to protect mixed-voltage I/O pad from ESD damage Meng-Hwang Liu, Chen-Shang Lai, Tao-Cheng Lu 2000-10-31
6130452 Virtual ground flash cell with asymmetrically placed source and drain and method of fabrication Wenpin Lu 2000-10-10
6121092 Silicide blocking process to form non-silicided regions on MOS devices Meng-Hwang Liu, Cheng-Shang Lai, Tao-Cheng Lu 2000-09-19
6055190 Device and method for suppressing bit line column leakage during erase verification of a memory cell Wenpin Lu, Ying-Che Lo, Ming-Jye Chiou 2000-04-25
6046482 Cell structure for mask ROM Tao-Cheng Lu 2000-04-04
6040993 Method for programming an analog/multi-level flash EEPROM Chia-Hsing Chen 2000-03-21
6031766 Method and circuit for substrate current induced hot e-injection (SCIHE) approach for V.sub.T convergence at low V.sub.cc voltage Chia-Shing Chen, Wenpin Lu, Ming-Hung Chou, Ying-Che Lo, Ming-Shang Chen 2000-02-29
6028790 Method and device for programming a non-volatile memory cell by controlling source current pulldown rate Chin-Hsi Lin, Ful-Long Ni 2000-02-22
5963808 Method of forming an asymmetric bird's beak cell for a flash EEPROM Wenpin Lu, Tao-Cheng Lu 1999-10-05
5959892 Apparatus and method for programming virtual ground EPROM array cell without disturbing adjacent cells Chin-Hsi Lin, Shi-Charng Ai, Chien-Sing Lee, Ful-Long Ni, Chin-Yi Huang 1999-09-28