Issued Patents All Time
Showing 1–25 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11468964 | Repair circuit of memory and method thereof | — | 2022-10-11 |
| 11416358 | Reordering circuit of memory, method of reordering memory bits, and accumulation circuit | — | 2022-08-16 |
| 7548445 | Over-driven access method and device for ferroelectric memory | Chi-Ming Weng | 2009-06-16 |
| 7453714 | Over-driven access method and device for ferroelectric memory | Chi-Ming Weng | 2008-11-18 |
| 7394678 | Over-driven access method and device for ferroelectric memory | Chi-Ming Weng | 2008-07-01 |
| 7382652 | NAND flash memory and blank page search method therefor | Hitoshi Shiga, Chih-Hung Wang | 2008-06-03 |
| 7307867 | Over-driven access method and device for ferroelectric memory | Chi-Ming Weng | 2007-12-11 |
| 7233527 | Nonvolatile memory structure | Chien-Hsing Lee, Jhyy-Cheng Liou | 2007-06-19 |
| 7227232 | Contactless mask programmable ROM | Jhyy-Cheng Liou | 2007-06-05 |
| 7200038 | Nonvolatile memory structure | Chien-Hsing Lee, Jhyy-Cheng Liou | 2007-04-03 |
| 7161850 | NAND flash memory and blank page search method therefor | Hitoshi Shiga, Chih-Hung Wang | 2007-01-09 |
| 7119394 | Nonvolatile memory device and method for fabricating the same | Tsung-Min Hsieh, Jhyy-Cheng Liou, Chien-Hsing Lee | 2006-10-10 |
| 7094649 | Method for forming multi-level mask ROM cell and NAND multi-level mask ROM | Chien-Hsing Lee, Jhyy-Cheng Liou | 2006-08-22 |
| 7088605 | FeRAM memory design using ROM array architecture | — | 2006-08-08 |
| 7085160 | NAND flash memory and blank page search method therefor | Hitoshi Shiga | 2006-08-01 |
| 7061042 | Double-cell memory device | Chien-Hsing Lee, Jhyy-Cheng Liou | 2006-06-13 |
| 7046549 | Nonvolatile memory structure | Chien-Hsing Lee, Jhyy-Cheng Liou | 2006-05-16 |
| 7020018 | Nonvolatile memory device and method for fabricating the same | Tsung-Min Hsieh, Jhyy-Cheng Liou, Chien-Hsing Lee | 2006-03-28 |
| 7015553 | Compact mask programmable ROM | Jhyy-Cheng Liou | 2006-03-21 |
| 6987298 | Circuit layout and structure for a non-volatile memory | Chien-Hsing Lee, Jhyy-Cheng Liou | 2006-01-17 |
| 6804140 | Capacitance sensing method of reading a ferroelectric RAM | Chi-Ming Weng | 2004-10-12 |
| 6757186 | Method and logic decision device for generating ferro-electric capacitor reference voltage | — | 2004-06-29 |
| 6700811 | Random access memory device and method for driving a plate line segment therein | Chi-Ming Weng | 2004-03-02 |
| 6621756 | Compact integrated circuit with memory array | Meng-Chu Huang, Chun-Li Chen, Ful-Long Ni | 2003-09-16 |
| 6525361 | Process and integrated circuit for a multilevel memory cell with an asymmetric drain | Tao-Cheng Lu, Chung-Ju Chen, Hon Sui Lin, Mam-Tsung Wang, Ful-Long Ni | 2003-02-25 |