Issued Patents All Time
Showing 76–100 of 125 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5780350 | MOSFET device with improved LDD region and method of making same | — | 1998-07-14 |
| 5780347 | Method of forming polysilicon local interconnects | — | 1998-07-14 |
| 5777360 | Hexagonal field programmable gate array architecture | Michael D. Rostoker, James S. Koford, Ranko Scepanovic, Edwin R. Jones, Gobi R. Padmanahben +4 more | 1998-07-07 |
| 5770492 | Self-aligned twin well process | — | 1998-06-23 |
| 5771187 | Multiple level storage DRAM cell | — | 1998-06-23 |
| 5763302 | Self-aligned twin well process | — | 1998-06-09 |
| 5761110 | Memory cell capable of storing more than two logic states by using programmable resistances | V. Swamy Irrinki, Raymond Leung, Alex Owens, Thomas R. Wik | 1998-06-02 |
| 5756395 | Process for forming metal interconnect structures for use with integrated circuit devices to form integrated circuit structures | Michael D. Rostoker | 1998-05-26 |
| 5742086 | Hexagonal DRAM array | Michael D. Rostoker, James S. Koford, Ranko Scepanovic, Edwin R. Jones, Gobi R. Padmanahben +4 more | 1998-04-21 |
| 5719733 | ESD protection for deep submicron CMOS devices with minimum tradeoff for latchup behavior | Hua Wei | 1998-02-17 |
| 5698468 | Silicidation process with etch stop | — | 1997-12-16 |
| 5674774 | Method of making self-aligned remote polysilicon contacts | Nicholas F. Pasch, Richard Schinella | 1997-10-07 |
| 5670393 | Method of making combined metal oxide semiconductor and junction field effect transistor device | — | 1997-09-23 |
| 5663590 | Product of process for formation of vias (or contact openings) and fuses in the same insulation layer with minimal additional steps | — | 1997-09-02 |
| 5663076 | Automating photolithography in the fabrication of integrated circuits | Michael D. Rostoker, Nicholas F. Pasch | 1997-09-02 |
| 5656850 | "Microelectronic integrated circuit including hexagonal semiconductor ""and"" g" | — | 1997-08-12 |
| 5654563 | "Microelectronic integrated circuit including triangular semiconductor ""or"" g" | Michael D. Rostoker, James S. Koford, Ranko Scepanovic, Edwin R. Jones, Gobi R. Padmanahben +4 more | 1997-08-05 |
| 5650648 | Integrated circuit structure having floating electrode with discontinuous phase of metal silicide formed on a surface thereof and process for making same | — | 1997-07-22 |
| 5650653 | "Microelectronic integrated circuit including triangular CMOS ""nand"" gate device" | Michael D. Rostoker, James S. Koford, Ranko Scepanovic, Edwin R. Jones, Gobi R. Padmanahben +4 more | 1997-07-22 |
| 5644152 | Conductive germanium/silicon member with a roughened surface thereon suitable for use in an integrated circuit structure | Michael D. Rostoker | 1997-07-01 |
| 5640049 | Metal interconnect structures for use with integrated circuit devices to form integrated circuit structures | Michael D. Rostoker | 1997-06-17 |
| 5631176 | Method of making combined JFET & MOS transistor device | — | 1997-05-20 |
| 5631581 | "Microelectronic integrated circuit including triangular semiconductor ""and"" gate device" | Michael D. Rostoker, James S. Koford, Ranko Scepanovic, Edwin R. Jones, Gobi R. Padmanahben +4 more | 1997-05-20 |
| 5614428 | Process and structure for reduction of channeling during implantation of source and drain regions in formation of MOS integrated circuit structures | — | 1997-03-25 |
| 5598026 | Low dielectric constant insulation layer for integrated circuit structure and method of making same | Nicholas F. Pasch | 1997-01-28 |