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Asynchronous control of memory self test |
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Method and program product for designing hierarchical circuit for quiescent current testing |
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Hierarchical design and test method and system, program product embodying the method and integrated circuit produced thereby |
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2003-09-02 |
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Method and apparatus for testing high performance circuits |
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Method and program product for modeling circuits with latch based design |
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2002-09-24 |
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Multiple clock rate test apparatus for testing digital systems |
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