Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8782779 | System and method for achieving protected region within computer system | Chris Giles, Russ W. Herrell, John A. Morrison, Andrew R. Wheeler, Gerald J. Kaufman, Jr. +1 more | 2014-07-15 |
| 8386702 | Memory controller | Larry J. Thayer | 2013-02-26 |
| 7624234 | Directory caches, and methods for operation thereof | Erin A. Handgen | 2009-11-24 |
| 7451249 | Method and apparatus for direct input and output in a virtual machine environment containing a guest operating system | Joe P. Cowan, Matthew Lovell, Jonathan Ross | 2008-11-11 |
| 7103793 | Memory controller having receiver circuitry capable of alternately generating one or more data streams as data is received at a data pad, in response to counts of strobe edges received at a strobe pad | Eric M. Rentschler, Jeffrey G. Hargis, George Thomas Letey | 2006-09-05 |
| 7103790 | Memory controller driver circuitry having a multiplexing stage to provide data to at least N-1 of N data propagation circuits, and having output merging circuitry to alternately couple the N data propagation circuits to a data pad to generate either a 1x or Mx stream of data | Eric M. Rentschler, Jeffrey G. Hargis | 2006-09-05 |
| 6889335 | Memory controller receiver circuitry with tri-state noise immunity | Jeffrey G. Hargis, Eric M. Rentschler | 2005-05-03 |
| 6715014 | Module array | Michael H. Cogdill | 2004-03-30 |
| 6678811 | Memory controller with 1X/MX write capability | Eric M. Rentschler, Jeffrey G. Hargis | 2004-01-13 |
| 6633965 | Memory controller with 1×/M× read capability | Eric M. Rentschler, Jeffrey G. Hargis | 2003-10-14 |
| 6073223 | Memory controller and method for intermittently activating and idling a clock signal for a synchronous memory | Curtis R. McAllister | 2000-06-06 |
| 5987576 | Method and apparatus for generating and distributing clock signals with minimal skew | David Allen Fotland | 1999-11-16 |
| 5961655 | Opportunistic use of pre-corrected data to improve processor performance | Stephen R. Undy | 1999-10-05 |
| 5928346 | Method for enhanced peripheral component interconnect bus split data transfer | Richard L. Carlson | 1999-07-27 |
| 5870573 | Transistor switch used to isolate bus devices and/or translate bus voltage levels | — | 1999-02-09 |
| 5689660 | Enhanced peripheral component interconnect bus protocol | Richard L. Carlson | 1997-11-18 |
| 5287477 | Memory-resource-driven arbitration | Russell C. Brockmann, William S. Jaffe | 1994-02-15 |
| 5274671 | Use of output impedance control to eliminate mastership change-over delays in a data communication network | — | 1993-12-28 |
| 5257356 | Method of reducing wasted bus bandwidth due to slow responding slaves in a multiprocessor computer system | Russell C. Brockmann, William S. Jaffe | 1993-10-26 |
| 5255373 | Decreasing average time to access a computer bus by eliminating arbitration delay when the bus is idle | Russell C. Brockmann, William S. Jaffe | 1993-10-19 |
| 5249297 | Methods and apparatus for carrying out transactions in a computer system | Russell C. Brockmann, William S. Jaffe | 1993-09-28 |