Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9871008 | Monolithic microwave integrated circuits | Paul W. Sanders, Wayne R. Burger, Joel E. Keys, Michael F. Petras, Robert A. Pryor +1 more | 2018-01-16 |
| 9508599 | Methods of making a monolithic microwave integrated circuit | Paul W. Sanders, Wayne R. Burger, Joel E. Keys, Michael F. Petras, Robert A. Pryor +1 more | 2016-11-29 |
| 9064712 | Monolithic microwave integrated circuit | Paul W. Sanders, Wayne R. Burger, Joel E. Keys, Michael F. Petras, Robert A. Pryor +1 more | 2015-06-23 |
| 8890324 | Semiconductor structure having a through substrate via (TSV) and method for forming | — | 2014-11-18 |
| 8530972 | Double gate MOSFET with coplanar surfaces for contacting source, drain, and bottom gate | Jay P. John | 2013-09-10 |
| 8518764 | Semiconductor structure having a through substrate via (TSV) and method for forming | Joel E. Keys, Hernan Rueda, Paul W. Sanders | 2013-08-27 |
| 8354325 | Method for forming a toroidal inductor in a semiconductor substrate | Qiang Li, Melvy F. Miller | 2013-01-15 |
| 8178950 | Multilayered through a via | Chanh M. Vuong | 2012-05-15 |
| 8039386 | Method for forming a through silicon via (TSV) | Ross E. Noble, Dina H. Triyoso | 2011-10-18 |
| 7964502 | Multilayered through via | Chanh M. Vuong | 2011-06-21 |
| 7799657 | Method of fabricating a substrate for a planar, double-gated, transistor process | — | 2010-09-21 |
| 7704838 | Method for forming an independent bottom gate connection for buried interconnection including bottom gate of a planar double gate MOSFET | Jay P. John | 2010-04-27 |
| 7679125 | Back-gated semiconductor device with a storage layer and methods for forming thereof | Craig T. Swift, Gowrishankar L. Chindalore, Michael A. Sadd | 2010-03-16 |
| 7563681 | Double-gated non-volatile memory and methods for forming thereof | Craig T. Swift, Michael A. Sadd | 2009-07-21 |
| 7538000 | Method of forming double gate transistors having varying gate dielectric thicknesses | — | 2009-05-26 |
| 7530037 | Methods of generating planar double gate transistor shapes and data processing system readable media to perform the methods | — | 2009-05-05 |
| 7491594 | Methods of generating planar double gate transistor shapes | — | 2009-02-17 |
| 7442591 | Method of making a multi-gate device | — | 2008-10-28 |
| 7387946 | Method of fabricating a substrate for a planar, double-gated, transistor process | — | 2008-06-17 |
| 7364953 | Manufacturing method to construct semiconductor-on-insulator with conductor layer sandwiched between buried dielectric layer and semiconductor layers | — | 2008-04-29 |
| 7341915 | Method of making planar double gate silicon-on-insulator structures | Philip Hsin-hua Li, Suman Banerjee, Olin L. Hartin, Jay P. John | 2008-03-11 |
| 7141476 | Method of forming a transistor with a bottom gate | — | 2006-11-28 |