Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12087813 | Deep trench isolation with field oxide | Abbas Ali, Rajni J. Aggarwal, Eugene C. Davis | 2024-09-10 |
| 10741687 | Trench DMOS transistor with reduced gate-to-drain capacitance | Yaojian Leng, Richard W. Foote | 2020-08-11 |
| 9716167 | Trench DMOS transistor with reduced gate-to-drain capacitance | Yaojian Leng, Richard W. Foote | 2017-07-25 |
| 8803260 | Low frequency CMUT with vent holes | Peter Johnson, Ira Oaktree Wygant | 2014-08-12 |
| 8563345 | Integration of structurally-stable isolated capacitive micromachined ultrasonic transducer (CMUT) array cells and array elements | Peter Johnson, Gokhan Percin, Shahram Mostafazadeh | 2013-10-22 |
| 8541853 | High frequency CMUT | Peter Johnson, Ira Oaktree Wygant | 2013-09-24 |
| 8455289 | Low frequency CMUT with thick oxide | Peter Johnson, Ira Oaktree Wygant | 2013-06-04 |
| 8455963 | Low frequency CMUT with vent holes | Peter Johnson, Ira Oaktree Wygant | 2013-06-04 |
| 8324006 | Method of forming a capacitive micromachined ultrasonic transducer (CMUT) | Peter Johnson, Ira Oaktree Wygant | 2012-12-04 |
| 7927958 | System and method for providing a self aligned bipolar transistor using a silicon nitride ring | Mingwei Xu | 2011-04-19 |
| 7910447 | System and method for providing a self aligned bipolar transistor using a simplified sacrificial nitride emitter | Mingwei Xu | 2011-03-22 |
| 7884023 | System and method for using siliciding PECVD silicon nitride as a dielectric anti-reflective coating and hard mask | Heather McCulloh, Patrick McCarthy, Henry G. Prosack, Jr. | 2011-02-08 |
| 7781295 | System and method for providing a single deposition emitter/base in a bipolar junction transistor | Jamal Ramdani, Craig Printy, Andre P. Labonte | 2010-08-24 |
| 7678657 | System and method for manufacturing an emitter structure in a complementary bipolar CMOS transistor manufacturing process | Todd Thibeault, Scott Ruby | 2010-03-16 |
| 7642168 | System and method for providing a self aligned bipolar transistor using a sacrificial polysilicon external base | Mingwei Xu | 2010-01-05 |
| 5556793 | Method of making a structure for top surface gettering of metallic impurities | George W. Hawkins, Israel A. Lesk, Peter L. Pegler, Hassan Pirastehfar | 1996-09-17 |
| 5371394 | Double implanted laterally diffused MOS device and method thereof | Gordon Ma, Hassan Pirastehfar | 1994-12-06 |
| 5252848 | Low on resistance field effect transistor | Robert B. Davies, Stephen J. Nugent, Hassan Pirastehfar | 1993-10-12 |