PL

Peichun Peter Liu

IBM: 43 patents #2,123 of 70,183Top 4%
KT Kabushiki Kaisha Toshiba: 3 patents #8,011 of 21,451Top 40%
TC Toshiba America Electronic Components: 1 patents #23 of 77Top 30%
SO Sony: 1 patents #17,262 of 25,231Top 70%
Overall (All Time): #68,392 of 4,157,543Top 2%
44
Patents All Time

Issued Patents All Time

Showing 25 most recent of 44 patents

Patent #TitleCo-InventorsDate
8611368 Controlling bandwidth reservations method and apparatus Shigehiro Asano, Charles Ray Johns, Matthew KING, David Mui, Jieming Qi 2013-12-17
8483227 Controlling bandwidth reservations method and apparatus Shigehiro Asano, Charles Ray Johns, Matthew KING, David Mui, Jieming Qi 2013-07-09
8171448 Structure for a livelock resolution circuit Charles Ray Johns, David J. Krolak, Alvan W. Ng 2012-05-01
8024489 System for communicating command parameters between a processor and a memory flow controller Michael Norman Day, Charles Johns, Todd Swanson, Thuong Quang Truong 2011-09-20
7861022 Livelock resolution Charles Ray Johns, David J. Krolak, Alvan W. Ng 2010-12-28
7725618 Memory barriers primitives in an asymmetric heterogeneous multiprocessor environment Michael Norman Day, Charles Ray Johns, Thuong Quang Truong, Takeshi Yamazaki 2010-05-25
7698473 Methods and apparatus for list transfers using DMA transfers in a multi-processor system Takeshi Yamazaki, Tsutomu Horikawa, James Allan Kahle, Charles Ray Johns, Michael Norman Day 2010-04-13
7657667 Method to provide cache management commands for a DMA controller Charles Ray Johns, James Allan Kahle, Thuong Quang Truong 2010-02-02
7590774 Method and system for efficient context swapping Charles Ray Johns, Takashi Omizo 2009-09-15
7500035 Livelock resolution method Charles Ray Johns, David J. Krolak, Alvan W. Ng 2009-03-03
7386636 System and method for communicating command parameters between a processor and a memory flow controller Michael Norman Day, Charles Johns, Todd Swanson, Thuong Quang Truong 2008-06-10
7287103 Method and apparatus for generating a mask value and command for extreme data rate memories utilizing error correction codes Paul Allen Ganfield, Kent Harold Haselhorst, Charles Ray Johns 2007-10-23
7243200 Establishing command order in an out of order DMA command queue Michael Norman Day, Charles Ray Johns, Thuong Quang Truong, Takeshi Yamazaki 2007-07-10
7231479 Round robin selection logic improves area efficiency and circuit speed Glen Howard Handlogten, Jieming Qi 2007-06-12
7225277 Proxy direct memory access Charles Ray Johns, Thuong Quang Truong, Asano Shigehiro, Takeshi Yamazaki 2007-05-29
7187614 Array read access control using MUX select signal gating of the read port Scott Raymond Cottier, Shohji Onishi 2007-03-06
7107376 Systems and methods for bandwidth shaping Shigehiro Asano, David Mui 2006-09-12
7069390 Implementation of a pseudo-LRU algorithm in a partitioned cache Wen-Tzer T. Chen, Kevin C. Stelzer 2006-06-27
7055004 Pseudo-LRU for a locking cache Jonathan James DeMent, Ronald P. Hall, Thuong Quang Truong 2006-05-30
7043579 Ring-topology based multiprocessor data access bus Sang Hoo Dhong, Harm Peter Hofstee, John Liberty 2006-05-09
6983387 Microprocessor chip simultaneous switching current reduction method and apparatus David William Boerstler, Sang Hoo Dhong, Harm Peter Hofstee 2006-01-03
6961820 System and method for identifying and accessing streaming data in a locked portion of a cache Michael Norman Day, Charles Ray Johns, James Allan Kahle, David Shippy, Thuong Quang Truong 2005-11-01
6931493 Implementation of an LRU and MRU algorithm in a partitioned cache Charles Ray Johns, James Allan Kahle 2005-08-16
6822486 Multiplexer methods and apparatus Matthew KING, David Mui, Jieming Qi 2004-11-23
6820143 On-chip data transfer in multi-processor system Michael Norman Day, Charles Ray Johns, James Allan Kahle, David Shippy, Thuong Quang Truong 2004-11-16