Issued Patents All Time
Showing 1–25 of 33 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11763908 | Memory system tester using test pad real time monitoring | Andrea Vigilante, Gianluca Scalisi, Andrea Pozzato, Andrea Salvioni | 2023-09-19 |
| 11657878 | Initialization techniques for memory devices | Antonino Pollio, Giuseppe Vito Portacci, Alessandro Magnavacca | 2023-05-23 |
| 11526277 | Adjustable NAND write performance | Giuseppe Cariello, Stefano Falduti, Ugo Russo | 2022-12-13 |
| 11238940 | Initialization techniques for memory devices | Antonino Pollio, Giuseppe Vito Portacci, Alessandro Magnavacca | 2022-02-01 |
| 11211136 | Memory system tester using test pad real time monitoring | Andrea Vigilante, Gianluca Scalisi, Andrea Pozzato, Andrea Salvioni | 2021-12-28 |
| 10901622 | Adjustable NAND write performance | Giuseppe Cariello, Stefano Falduti, Ugo Russo | 2021-01-26 |
| 7761675 | Flash memory device with improved management of protection information | Francesco Mastroianni, Antonino Mondello, Elena Cussotto, Massimiliano Mollichelli | 2010-07-20 |
| 6950337 | Nonvolatile memory device with simultaneous read/write | Andrea Bellini, Alessandro Magnavacca, Carlo Lisi | 2005-09-27 |
| 6912598 | Non-volatile memory with functional capability of simultaneous modification of the content and burst mode read or page mode read | Lorenzo Bedarida, Antonino Geraci, Simone Bartoli | 2005-06-28 |
| 6903995 | Test structure for the measurement of contact to gate distance in non-volatile memory devices and corresponding test method | Emilio Camerlenghi, Paolo Cappelletti, Tecla Ghilardi, Giorgio Servalli | 2005-06-07 |
| 6854040 | Non-volatile memory device with burst mode reading and corresponding reading method | Simone Bartoli, Antonino Geraci, Lorenzo Bedarida | 2005-02-08 |
| 6480436 | Non-volatile memory with a charge pump with regulated voltage | Emanuele Confalonieri, Lorenzo Bedarida, Simone Bartoli | 2002-11-12 |
| 6442068 | Non-volatile memory with functional capability of burst mode read and page mode read during suspension of an operation of electrical alteration | Simone Bartoli, Lorenzo Bedarida, Antonio Russo | 2002-08-27 |
| 6401164 | Sectored semiconductor memory device with configurable memory sector addresses | Simone Bartoli, Vincenzo Dima | 2002-06-04 |
| 6385107 | Architecture for handling internal voltages in a non-volatile memory, particularly in a single-voltage supply type of dual-work flash memory | Lorenzo Bedarida, Simone Bartoli, Antonio Russo | 2002-05-07 |
| 6349059 | Method for reading data from a non-volatile memory device with autodetect burst mode reading and corresponding reading circuit | Simone Bartoli, Antonio Geraci, Lorenzo Bedarida | 2002-02-19 |
| 6339551 | Semiconductor device with selectable pads | Simone Bartoli, Claudio Nava, Antonio Russo | 2002-01-15 |
| 6320792 | Row decoding circuit for a semiconductor non-volatile electrically programmable memory and corresponding method | Fabio Tassan Caser, Marcello Cane | 2001-11-20 |
| 6137725 | Row decoding circuit for a semiconductor non-volatile electrically programmable memory and corresponding method | Fabio Tassan Caser, Marcello Cane | 2000-10-24 |
| 5999456 | Flash EEPROM with controlled discharge time of the word lines and source potentials after erase | Corrado Villa, Marcello Carrera | 1999-12-07 |
| 5994948 | CMOS twin-tub negative voltage switching architecture | Simone Bartoli, Antonio Russo | 1999-11-30 |
| 5926059 | Stacked Charge pump circuit | Francesco Brani, Marco Dallabora | 1999-07-20 |
| 5920505 | Negative word line voltage regulation circuit for electrically erasable semiconductor memory devices | Corrado Villa, Marcello Carrera | 1999-07-06 |
| 5848013 | Row decoding circuit for semiconductor non-volatile electrically programmable memory and corresponding method | Fabio Tassan Caser, Marcello Cane | 1998-12-08 |
| 5784314 | Method for setting the threshold voltage of a reference memory cell | Marco Dallabora, Marcello Carrera | 1998-07-21 |